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authorSuneel Garapati <sgarapati@marvell.com>2019-10-19 18:47:37 -0700
committerStefan Roese <sr@denx.de>2020-08-25 08:01:16 +0200
commit0a668f6d38a2a631eb872f4f1107399db46b1c15 (patch)
treed5d01bd1b1b619a47adbc99fd65272e4b71957ef /arch/arm/mach-octeontx2/clock.c
parent03c2288070155ee88d0c3341748a1b2b13418d8c (diff)
arm: octeontx2: Add support for OcteonTX2 SoC platforms
This patch adds support for all OcteonTX2 96xx/95xx boards from Marvell. For 96xx boards, use octeontx_96xx_defconfig and for 95xx boards, use octeontx_95xx_defconfig. Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Diffstat (limited to 'arch/arm/mach-octeontx2/clock.c')
-rw-r--r--arch/arm/mach-octeontx2/clock.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-octeontx2/clock.c b/arch/arm/mach-octeontx2/clock.c
new file mode 100644
index 0000000000..9da21077ec
--- /dev/null
+++ b/arch/arm/mach-octeontx2/clock.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ *
+ * https://spdx.org/licenses
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/board.h>
+#include <asm/arch/clock.h>
+
+/**
+ * Returns the I/O clock speed in Hz
+ */
+u64 octeontx_get_io_clock(void)
+{
+ union rst_boot rst_boot;
+
+ rst_boot.u = readq(RST_BOOT);
+
+ return rst_boot.s.pnr_mul * PLL_REF_CLK;
+}
+
+/**
+ * Returns the core clock speed in Hz
+ */
+u64 octeontx_get_core_clock(void)
+{
+ union rst_boot rst_boot;
+
+ rst_boot.u = readq(RST_BOOT);
+
+ return rst_boot.s.c_mul * PLL_REF_CLK;
+}