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authorSiarhei Siamashka <siarhei.siamashka@gmail.com>2017-03-06 03:16:53 +0200
committerTom Rini <trini@konsulko.com>2017-03-14 20:40:17 -0400
commit19a75b8cf8d17fffa9493bf3f3e380d76eccd8dd (patch)
tree6a23baf8e4cf02ff764ce0d2d1adf76fe642386c /arch/arm/mach-omap2/omap3/board.c
parent7584f2e0fb0f3c1686ab066c43c3279d8c326978 (diff)
arm: omap3: Bring back ARM errata workaround 725233
The workaround for ARM errata 725233 had been lost since commit 45bf05854bc94e (armv7: adapt omap3 to the new cache maintenance framework). Bring it back in order to avoid very difficult to reproduce, but actually encountered in the wild CPU deadlocks when running software rendered X11 desktop on OMAP3530 hardware. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Migrate to Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap3/board.c')
-rw-r--r--arch/arm/mach-omap2/omap3/board.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index a727226563..f1436fbf51 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -364,6 +364,16 @@ void __weak omap3_set_aux_cr_secure(u32 acr)
(u32 *)&emu_romcode_params);
}
+void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
+ u32 cpu_rev_comb, u32 cpu_variant,
+ u32 cpu_rev)
+{
+ if (get_device_type() == GP_DEVICE)
+ omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_L2ACR, l2auxctrl);
+
+ /* L2 Cache Auxiliary Control Register is not banked */
+}
+
void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
u32 cpu_variant, u32 cpu_rev)
{