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authorSuman Anna <s-anna@ti.com>2019-09-04 16:01:49 +0530
committerTom Rini <trini@konsulko.com>2019-10-11 10:07:59 -0400
commit60bdc6b9f372d3e2d89c2e59b22ea7f3867a090d (patch)
tree98d825b9c6e88d8b9438f49f0b12d4837a127e66 /arch/arm/mach-owl
parent65b91b2f8c4aca31abaada3980096ba369609eaa (diff)
armv8: K3: am65x: Update DDR address regions in MMU table
The A53 U-Boot code can load and boot the MCU domain R5F cores (either a single core in LockStep mode or 2 cores in Split mode) to achieve various early system functionalities. Change the memory attributes for the DDR regions used by the remote processors so that the cores can see and execute the proper code loaded by U-Boot. These regions are currently limited to 0xa0000000 to 0xa2100000 as per the DDR carveouts assigned for these R5F cores in the overall DDR memory map. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-owl')
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