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authorhuang lin <hl@rock-chips.com>2015-11-17 14:20:27 +0800
committerSimon Glass <sjg@chromium.org>2015-12-01 08:07:22 -0700
commitbe1d5e0388d2e506d875d4b984485526bdf3197f (patch)
tree8118089e14f8848081646826253e8ada3d9379ef /arch/arm/mach-rockchip/Kconfig
parent53c45f0ca27cbf6acd840e87beaa1ba1be74399b (diff)
rockchip: rk3036: Add core Soc start-up code
rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
Diffstat (limited to 'arch/arm/mach-rockchip/Kconfig')
-rw-r--r--arch/arm/mach-rockchip/Kconfig10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fa1f426753..a2069f878d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -9,6 +9,14 @@ config ROCKCHIP_RK3288
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
+config ROCKCHIP_RK3036
+ bool "Support Rockchip RK3036"
+ help
+ The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
+ including NEON and GPU, Mali-400 graphics, several DDR3 options
+ and video codec support. Peripherals include Gigabit Ethernet,
+ USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
config SYS_MALLOC_F
default y
@@ -31,5 +39,5 @@ config DM_GPIO
default y
source "arch/arm/mach-rockchip/rk3288/Kconfig"
-
+source "arch/arm/mach-rockchip/rk3036/Kconfig"
endif