diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2019-07-22 19:59:14 +0800 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-29 10:25:27 +0800 |
| commit | 4dd4fc32dbe1f0e9359031319d03617789266fe8 (patch) | |
| tree | 6bf31de205af1ef59ac569f36a3cdda3bdd607b7 /arch/arm/mach-rockchip/rk3188/rk3188.c | |
| parent | 84a6a27ae3fffda333e801c0fa4c64da85eff55b (diff) | |
rockchip: rk3188: move usb uart init into arch_cpu_init()
The SoC feature init will be better to use arch_cpu_init() and
goes to soc file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/mach-rockchip/rk3188/rk3188.c')
| -rw-r--r-- | arch/arm/mach-rockchip/rk3188/rk3188.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index 933484e0df..f7e12a95b2 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -7,11 +7,12 @@ #include <asm/arch-rockchip/grf_rk3188.h> #include <asm/arch-rockchip/hardware.h> +#define GRF_BASE 0x20008000 + #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) { /* Enable early UART on the RK3188 */ -#define GRF_BASE 0x20008000 struct rk3188_grf * const grf = (void *)GRF_BASE; enum { GPIO1B1_SHIFT = 2, @@ -34,3 +35,28 @@ void board_debug_uart_init(void) GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); } #endif + +int arch_cpu_init(void) +{ +#ifdef CONFIG_ROCKCHIP_USB_UART + struct rk3188_grf * const grf = (void *)GRF_BASE; + + rk_clrsetreg(&grf->uoc0_con[0], + SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK, + 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT | + 1 << COMMON_ON_N_SHIFT); + rk_clrsetreg(&grf->uoc0_con[2], + SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT); + rk_clrsetreg(&grf->uoc0_con[3], + OPMODE_MASK | XCVRSELECT_MASK | + TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK, + OPMODE_NODRIVING << OPMODE_SHIFT | + XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT | + 1 << TERMSEL_FULLSPEED_SHIFT | + 1 << SUSPENDN_SHIFT); + rk_clrsetreg(&grf->uoc0_con[0], + BYPASSSEL_MASK | BYPASSDMEN_MASK, + 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT); +#endif + return 0; +} |