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authorKever Yang <kever.yang@rock-chips.com>2017-04-20 17:03:46 +0800
committerSimon Glass <sjg@chromium.org>2017-05-10 13:37:21 -0600
commitfa1392a236dfebbe938a48f124c8332759aba8e5 (patch)
tree20d3cfb0e657add5e6e97a1329249b9b884c1739 /arch/arm/mach-rockchip
parent602778d3c7ea367bb55f73ec33e8ef8c2c1dcb12 (diff)
rockchip: reserve memory for rk3399 ATF data
There are 3 regions used by rk3399 ATF: - bl31 code, located at 0x10000; - cortex-m0 code and data, located at 0xff8c0000; - bl31 data, located at 0xff8c1000 ~ 0xff8c4000; SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory for ATF data, or else there will be memory corrupt after SPL loads the ATF image. More detail about cortex-M0 code in ATF: https://github.com/ARM-software/arm-trusted-firmware/commit/ 8382e17c4c6bffd15119dfce1ee4372e3c1a7890 Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-rockchip')
-rw-r--r--arch/arm/mach-rockchip/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2b752ad5ca..740dbdf70e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -74,6 +74,14 @@ config ROCKCHIP_SPL_BACK_TO_BROM
SPL will return to the boot rom, which will then load the U-Boot
binary to keep going on.
+config ROCKCHIP_SPL_RESERVE_IRAM
+ hex "Size of IRAM reserved in SPL"
+ default 0x4000
+ help
+ SPL may need reserve memory for firmware loaded by SPL, whose load
+ address is in IRAM and may overlay with SPL text area if not
+ reserved.
+
config ROCKCHIP_BROM_HELPER
bool