diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-07-17 14:36:48 +0900 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2020-07-25 14:46:57 -0600 |
commit | 2548493ab41e8dfa8ed43b64fd0fa66c6f3cddc3 (patch) | |
tree | b2fa5f24d61dc8a3a6e80831d08d192b99a70fbc /arch/arm/mach-snapdragon | |
parent | cf081a52ad830127a12715a7a8c64c2bc9b7dfeb (diff) |
treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/
The semantic patch that makes this change is as follows:
<smpl>
@@
expression dev;
@@
-devfdt_get_addr(dev)
+dev_read_addr(dev)
</smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-snapdragon')
-rw-r--r-- | arch/arm/mach-snapdragon/clock-snapdragon.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c index 85526186c6..69d65c82e3 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c @@ -114,7 +114,7 @@ static int msm_clk_probe(struct udevice *dev) { struct msm_clk_priv *priv = dev_get_priv(dev); - priv->base = devfdt_get_addr(dev); + priv->base = dev_read_addr(dev); if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index 442d236255..4c2af21308 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -56,7 +56,7 @@ static int msm_pinctrl_probe(struct udevice *dev) { struct msm_pinctrl_priv *priv = dev_get_priv(dev); - priv->base = devfdt_get_addr(dev); + priv->base = dev_read_addr(dev); priv->data = (struct msm_pinctrl_data *)dev->driver_data; return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0; |