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author | Ley Foon Tan <ley.foon.tan@intel.com> | 2018-05-18 22:05:22 +0800 |
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committer | Marek Vasut <marex@denx.de> | 2018-05-18 10:30:47 +0200 |
commit | 508791a035ea8e2698c52e1547f77048c49c4391 (patch) | |
tree | bc3356cea50334f53397a7584fcdf36eb5ca8a74 /arch/arm/mach-socfpga/Makefile | |
parent | 641f7470b66ad513c21ffd8113cca5eca09d1df5 (diff) |
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Add Clock Manager driver support for Stratix SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/Makefile')
-rw-r--r-- | arch/arm/mach-socfpga/Makefile | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 89b4fdf0f7..6ee8ce66e5 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -28,6 +28,10 @@ obj-y += pinmux_arria10.o obj-y += reset_manager_arria10.o endif +ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 +obj-y += clock_manager_s10.o +obj-y += wrap_pll_config_s10.o +endif ifdef CONFIG_SPL_BUILD obj-y += spl.o ifdef CONFIG_TARGET_SOCFPGA_GEN5 |