diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-11-08 10:38:20 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2020-01-07 14:38:33 +0100 |
| commit | db5741f7a85ec3ee79b64496172afaa7dc2cb225 (patch) | |
| tree | 20f749d41ff3c329758f16c1a67f9c5772f35278 /arch/arm/mach-socfpga/clock_manager_s10.c | |
| parent | bb25aca1343304e0334e9eebfb9d350eaf276882 (diff) | |
arm: socfpga: Convert system manager from struct to defines
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Change to get system manager base address from DT node instead of
using #define.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/arm/mach-socfpga/clock_manager_s10.c')
| -rw-r--r-- | arch/arm/mach-socfpga/clock_manager_s10.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c index 3ba2a00c02..88817030ab 100644 --- a/arch/arm/mach-socfpga/clock_manager_s10.c +++ b/arch/arm/mach-socfpga/clock_manager_s10.c @@ -14,8 +14,6 @@ DECLARE_GLOBAL_DATA_PTR; static const struct socfpga_clock_manager *clock_manager_base = (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS; -static const struct socfpga_system_manager *sysmgr_regs = - (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; /* * function to write the bypass register which requires a poll of the @@ -351,7 +349,7 @@ unsigned int cm_get_l4_sp_clk_hz(void) unsigned int cm_get_qspi_controller_clk_hz(void) { - return readl(&sysmgr_regs->boot_scratch_cold0); + return readl(socfpga_get_sysmgr_addr() + SYSMGR_S10_BOOT_SCRATCH_COLD0); } unsigned int cm_get_spi_controller_clk_hz(void) |