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authorTom Rini <trini@konsulko.com>2019-05-07 09:37:11 -0400
committerTom Rini <trini@konsulko.com>2019-05-07 09:37:11 -0400
commit6984044d0516d855ec621fff741f372932d28669 (patch)
treeb95d8bb5c2feee06d194440eeb38df9976ff8a25 /arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
parent44237e272f1eac3b026709e76333a07b2d3a3523 (diff)
parent32e308dd796f34f85d1c088e3218fa3403a9080f (diff)
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Assorted stratix10 fixes. - DDR driver DM migration.
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach/reset_manager_s10.h')
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_s10.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
index e186296791..b93bbaf537 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
@@ -48,6 +48,8 @@ struct socfpga_reset_manager {
#define RSTMGR_MPUMODRST_CORE0 0
#define RSTMGR_PER0MODRST_OCP_MASK 0x0020bf00
#define RSTMGR_BRGMODRST_DDRSCH_MASK 0X00000040
+#define RSTMGR_BRGMODRST_FPGA2SOC_MASK 0x00000004
+
/* Watchdogs and MPU warm reset mask */
#define RSTMGR_L4WD_MPU_WARMRESET_MASK 0x000F0F00