diff options
| author | Tien Fong Chee <tien.fong.chee@intel.com> | 2017-12-05 15:58:02 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-05-18 10:30:47 +0200 |
| commit | 5658a299bdd2f616277eaea5d601976108d18326 (patch) | |
| tree | 40e5da58a958f474b55e9fc7d40a3f88159bf819 /arch/arm/mach-socfpga/include/mach | |
| parent | 53faef1e3fea9ab45981707eaebdacd1af0275d5 (diff) | |
ARM: socfpga: Add DDR driver for Arria 10
Add DDR driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/sdram.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/sdram.h index 1a4b22accd..79cb9e6064 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram.h +++ b/arch/arm/mach-socfpga/include/mach/sdram.h @@ -9,6 +9,8 @@ #if defined(CONFIG_TARGET_SOCFPGA_GEN5) #include <asm/arch/sdram_gen5.h> +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#include <asm/arch/sdram_arria10.h> #endif #endif diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h index 8ae8d1bc96..25b82fb285 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h @@ -7,6 +7,7 @@ #define _SOCFPGA_SDRAM_ARRIA10_H_ #ifndef __ASSEMBLY__ +int ddr_calibration_sequence(void); struct socfpga_ecc_hmc { u32 ip_rev_id; @@ -203,6 +204,7 @@ struct socfpga_io48_mmr { u32 niosreserve1; u32 niosreserve2; }; + #endif /*__ASSEMBLY__*/ #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK 0x1F000000 |