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authorTom Rini <trini@konsulko.com>2019-02-18 22:12:59 -0500
committerTom Rini <trini@konsulko.com>2019-02-18 22:12:59 -0500
commitb78a9e2212d4d15fd16af41ae33d05a5c33954de (patch)
tree994b373c7178adb852da72c2f5ef91d521ffda4b /arch/arm/mach-socfpga/misc_gen5.c
parentf14de0014c56093feecf42ca38b8ae5b3878f176 (diff)
parent5097ba6177bad8c7e09b50149cacd6fd5020f0c8 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Misc Gen5 fixes - stratix10 bugfix - dwmmc bugfix
Diffstat (limited to 'arch/arm/mach-socfpga/misc_gen5.c')
-rw-r--r--arch/arm/mach-socfpga/misc_gen5.c44
1 files changed, 1 insertions, 43 deletions
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 04f237d100..6e11ba6cb2 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -54,48 +54,6 @@ static Altera_desc altera_fpga[] = {
},
};
-/*
- * DesignWare Ethernet initialization
- */
-#ifdef CONFIG_ETH_DESIGNWARE
-static void gen5_dwmac_reset(const u8 of_reset_id, const u8 phymode)
-{
- u32 physhift, reset;
-
- if (of_reset_id == EMAC0_RESET) {
- physhift = SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB;
- reset = SOCFPGA_RESET(EMAC0);
- } else if (of_reset_id == EMAC1_RESET) {
- physhift = SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB;
- reset = SOCFPGA_RESET(EMAC1);
- } else {
- printf("GMAC: Invalid reset ID (%i)!\n", of_reset_id);
- return;
- }
-
- /* configure to PHY interface select choosed */
- clrsetbits_le32(&sysmgr_regs->emacgrp_ctrl,
- SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << physhift,
- phymode << physhift);
-
- /* Release the EMAC controller from reset */
- socfpga_per_reset(reset, 0);
-}
-
-static int socfpga_eth_reset(void)
-{
- /* Put all GMACs into RESET state. */
- socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1);
- socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1);
- return socfpga_eth_reset_common(gen5_dwmac_reset);
-};
-#else
-static int socfpga_eth_reset(void)
-{
- return 0;
-};
-#endif
-
static const struct {
const u16 pn;
const char *name;
@@ -178,7 +136,7 @@ int arch_misc_init(void)
env_set("bootmode", bsel_str[bsel].mode);
if (fpga_id >= 0)
env_set("fpgatype", socfpga_fpga_model[fpga_id].var);
- return socfpga_eth_reset();
+ return 0;
}
#endif