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authorAng, Chee Hong <chee.hong.ang@intel.com>2018-12-19 18:35:15 -0800
committerMarek Vasut <marex@denx.de>2018-12-20 17:12:25 +0100
commit877ec6ebbd247d54706e8f18a5d0c85da229a163 (patch)
treea1b827d9d2345e6401134c8474f6afe76b7ad367 /arch/arm/mach-socfpga/misc_s10.c
parentc41e660b6bb4405fb511c7af29aad4271f6b39a8 (diff)
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
Enable 'fpga' command in u-boot. User will be able to use the FPGA command to program the FPGA on Stratix10 SoC. Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/misc_s10.c')
-rw-r--r--arch/arm/mach-socfpga/misc_s10.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index e599362f14..113eace650 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -25,6 +25,26 @@ static struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
/*
+ * FPGA programming support for SoC FPGA Stratix 10
+ */
+static Altera_desc altera_fpga[] = {
+ {
+ /* Family */
+ Intel_FPGA_Stratix10,
+ /* Interface type */
+ secure_device_manager_mailbox,
+ /* No limitation as additional data will be ignored */
+ -1,
+ /* No device function table */
+ NULL,
+ /* Base interface address specified in driver */
+ NULL,
+ /* No cookie implementation */
+ 0
+ },
+};
+
+/*
* DesignWare Ethernet initialization
*/
#ifdef CONFIG_ETH_DESIGNWARE
@@ -125,6 +145,8 @@ int arch_misc_init(void)
int arch_early_init_r(void)
{
+ socfpga_fpga_add(&altera_fpga[0]);
+
return 0;
}