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authorLey Foon Tan <ley.foon.tan@intel.com>2018-05-18 22:05:23 +0800
committerMarek Vasut <marex@denx.de>2018-05-18 10:30:47 +0200
commit3607a8084aa718a10613ec4e5dd467b9300fc0a2 (patch)
tree3b3c5f9c7ea74d3cac7a473728d0336f8ec3154f /arch/arm/mach-socfpga/reset_manager.c
parent508791a035ea8e2698c52e1547f77048c49c4391 (diff)
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Add Reset Manager driver support for Stratix SoC Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/reset_manager.c')
-rw-r--r--arch/arm/mach-socfpga/reset_manager.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/reset_manager.c b/arch/arm/mach-socfpga/reset_manager.c
index 1389c82169..e0a01ed07a 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -8,8 +8,16 @@
#include <asm/io.h>
#include <asm/arch/reset_manager.h>
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+#include <asm/arch/mailbox_s10.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
static const struct socfpga_reset_manager *reset_manager_base =
(void *)SOCFPGA_RSTMGR_ADDRESS;
+#endif
/*
* Write the reset manager register to cause reset
@@ -17,8 +25,13 @@ static const struct socfpga_reset_manager *reset_manager_base =
void reset_cpu(ulong addr)
{
/* request a warm reset */
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+ puts("Mailbox: Issuing mailbox cmd REBOOT_HPS\n");
+ mbox_reset_cold();
+#else
writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
&reset_manager_base->ctrl);
+#endif
/*
* infinite loop here as watchdog will trigger and reset
* the processor