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author | Ley Foon Tan <ley.foon.tan@intel.com> | 2018-08-16 02:20:17 +0800 |
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committer | Marek Vasut <marex@denx.de> | 2018-08-15 12:41:09 +0200 |
commit | b0c0a715f90690a7dd4f33cb5b5c21960be26d3c (patch) | |
tree | a22bf2d8876bc28499b37a22572468d0c16d255d /arch/arm/mach-socfpga/timer.c | |
parent | d81b5da3fef726f645132e1b84caed7b6e34020f (diff) |
arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask
Bitmask for EMAC should be bit-0, EMAC1 bit-8 and EMAC2 bit-16.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/timer.c')
0 files changed, 0 insertions, 0 deletions