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| author | Marek Vasut <marex@denx.de> | 2020-03-31 19:51:23 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2020-04-01 10:12:44 +0200 |
| commit | 81169ca3cc32733214c14b8751e049b345b6280f (patch) | |
| tree | 84f05ee278f995de9cf5c4ace6def61e87c496ec /arch/arm/mach-socfpga/wrap_pll_config_s10.c | |
| parent | af827140e5965e5bb2bcad1c53ca8419b428ff6d (diff) | |
ARM: dts: stm32: Repair SD1 pre-reloc pinmux DT node on AV96
The sdmmc1_dir_pins_a: sdmmc1-dir-0 layout changed in commit 35a54d41d9d4
("ARM: dts: stm32mp1: sync device tree with v5.2-rc4") such that pins{};
became pins1{};pins2{};, however the SPL extras were not updated to reflect
that change. Fix this.
This fixes booting from SD1 X9 slot on the AV96 board.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Fixes: 35a54d41d9d4 ("ARM: dts: stm32mp1: sync device tree with v5.2-rc4")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/mach-socfpga/wrap_pll_config_s10.c')
0 files changed, 0 insertions, 0 deletions