diff options
author | Philipp Rosenberger <ilu@linutronix.de> | 2015-11-12 18:23:10 +0100 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2015-11-30 13:30:19 +0100 |
commit | 8a30e3a73a0a7db44cf81f486feba684cbcb4be5 (patch) | |
tree | 1a022cb082c2a112eee57d2a3fde6c6d2f1847da /arch/arm/mach-socfpga | |
parent | fa8883a1e39a20e72aaa5093af0c80062cb95757 (diff) |
arm: socfpga: reset: FIX address of tstscratch register
The Cyclone V Hard Processor System Technical Reference Manual in the
chapter about the Reset Manager Module Address Map stats that the offset
of the tstscratch register ist 0x54 not 0x24.
Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02
page 3-17 Reset Manager Module Address Map
Signed-off-by: Philipp Rosenberger <ilu@linutronix.de>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r-- | arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h index 666a2ef8df..e50fbd86e6 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h @@ -25,6 +25,7 @@ struct socfpga_reset_manager { u32 per2_mod_reset; u32 brg_mod_reset; u32 misc_mod_reset; + u32 padding2[12]; u32 tstscratch; }; |