diff options
author | Simon Glass <sjg@chromium.org> | 2020-05-10 11:40:13 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-05-18 21:19:23 -0400 |
commit | cd93d625fd751d55c729c78b10f82109d56a5f1d (patch) | |
tree | 158fd30f3d06142f6a99cbae6ed8ccb0f3be567b /arch/arm/mach-socfpga | |
parent | f09f1ecbe77863ecefe586ccd6000064b49105a3 (diff) |
common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-socfpga')
14 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h index 8d62d75432..11ddee5cb6 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h @@ -8,6 +8,8 @@ #ifndef __ASSEMBLY__ +#include <linux/bitops.h> + /* Clock manager group */ #define CLKMGR_A10_CTRL 0x00 #define CLKMGR_A10_INTR 0x04 @@ -64,6 +66,7 @@ int cm_basic_init(const void *blob); #endif +#include <linux/bitops.h> unsigned int cm_get_l4_sp_clk_hz(void); unsigned long cm_get_mpu_clk_hz(void); diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h index fc6d230156..5c9abe619b 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h @@ -8,6 +8,8 @@ #ifndef __ASSEMBLY__ +#include <linux/bitops.h> + struct cm_config { /* main group */ u32 main_vco_base; @@ -109,6 +111,7 @@ int cm_basic_init(const struct cm_config * const cfg); const struct cm_config * const cm_get_default_config(void); #endif /* __ASSEMBLY__ */ +#include <linux/bitops.h> #define LOCKED_MASK \ (CLKMGR_INTER_SDRPLLLOCKED_MASK | \ CLKMGR_INTER_PERPLLLOCKED_MASK | \ diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h index 9d2b3babab..cb7923baef 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -8,6 +8,7 @@ #define _CLOCK_MANAGER_S10_ #include <asm/arch/clock_manager_soc64.h> +#include <linux/bitops.h> /* Clock speed accessors */ unsigned long cm_get_mpu_clk_hz(void); diff --git a/arch/arm/mach-socfpga/include/mach/firewall.h b/arch/arm/mach-socfpga/include/mach/firewall.h index 430341bea1..adab65bc96 100644 --- a/arch/arm/mach-socfpga/include/mach/firewall.h +++ b/arch/arm/mach-socfpga/include/mach/firewall.h @@ -7,6 +7,8 @@ #ifndef _FIREWALL_H_ #define _FIREWALL_H_ +#include <linux/bitops.h> + struct socfpga_firwall_l4_per { u32 nand; /* 0x00 */ u32 nand_data; diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h index 62249b3695..048708202c 100644 --- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h @@ -7,6 +7,7 @@ #include <asm/cache.h> #include <altera.h> #include <image.h> +#include <linux/bitops.h> #ifndef _FPGA_MANAGER_ARRIA10_H_ #define _FPGA_MANAGER_ARRIA10_H_ diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h index c8ec5d4c3c..e08c005628 100644 --- a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h @@ -7,6 +7,7 @@ #ifndef _FPGA_MANAGER_GEN5_H_ #define _FPGA_MANAGER_GEN5_H_ +#include <linux/bitops.h> #define FPGAMGRREGS_STAT_MODE_MASK 0x7 #define FPGAMGRREGS_STAT_MSEL_MASK 0xf8 #define FPGAMGRREGS_STAT_MSEL_LSB 3 diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h index ae728a5df5..55707ab9c5 100644 --- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h +++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h @@ -8,6 +8,7 @@ #define _MAILBOX_S10_H_ /* user define Uboot ID */ +#include <linux/bitops.h> #define MBOX_CLIENT_ID_UBOOT 0xB #define MBOX_ID_UBOOT 0x1 diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h index 22e4eb33de..19507c292d 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h @@ -7,6 +7,7 @@ #define _RESET_MANAGER_ARRIA10_H_ #include <dt-bindings/reset/altr,rst-mgr-a10.h> +#include <linux/bitops.h> void socfpga_watchdog_disable(void); void socfpga_reset_deassert_noc_ddr_scheduler(void); diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h index f2773883fd..ff05994ccc 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h @@ -7,6 +7,7 @@ #define _SOCFPGA_SDRAM_ARRIA10_H_ #ifndef __ASSEMBLY__ +#include <linux/bitops.h> int ddr_calibration_sequence(void); struct socfpga_ecc_hmc { diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index 6de0a08131..f816954717 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -94,5 +94,6 @@ phys_addr_t socfpga_get_sysmgr_addr(void); #define SYSMGR_GET_BOOTINFO_BSEL(bsel) \ (((bsel) >> SYSMGR_BOOTINFO_BSEL_SHIFT) & 7) +#include <linux/bitops.h> #endif #endif /* _SYSTEM_MANAGER_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h index 3a6c9515c6..c90f63a754 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h @@ -6,6 +6,7 @@ #ifndef _SYSTEM_MANAGER_SOC64_H_ #define _SYSTEM_MANAGER_SOC64_H_ +#include <linux/bitops.h> void sysmgr_pinmux_init(void); void populate_sysmgr_fpgaintf_module(void); void populate_sysmgr_pinmux(void); diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 39acc8cfdb..7209e8d6db 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -10,6 +10,7 @@ #include <env.h> #include <errno.h> #include <fdtdec.h> +#include <linux/bitops.h> #include <linux/libfdt.h> #include <altera.h> #include <miiphy.h> diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 1008a78dc8..a65860ef02 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -9,6 +9,7 @@ #include <asm/arch/fpga_manager.h> #include <asm/arch/reset_manager.h> #include <asm/arch/system_manager.h> +#include <linux/bitops.h> /* Assert or de-assert SoCFPGA reset manager reset. */ void socfpga_per_reset(u32 reset, int set) diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index 91bc9df70a..5a7c5ef76d 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -24,6 +24,7 @@ #include <fdtdec.h> #include <watchdog.h> #include <dm/uclass.h> +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; |