diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-10 16:08:49 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-11 17:58:06 +0900 |
| commit | e8a9293295a1a54f6e43970bed2d3bfd124be02c (patch) | |
| tree | fa423647048b25852bd68aa66175b2d7f879df9a /arch/arm/mach-uniphier/arm32/psci_smp.S | |
| parent | ee9bc77f3abe316126c2413c77dddac2401214a8 (diff) | |
ARM: uniphier: add PSCI support for UniPhier ARMv7 SoCs
Currently, only the CPU_ON function is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/arm32/psci_smp.S')
| -rw-r--r-- | arch/arm/mach-uniphier/arm32/psci_smp.S | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/arm32/psci_smp.S b/arch/arm/mach-uniphier/arm32/psci_smp.S new file mode 100644 index 0000000000..aa2fa5f3fc --- /dev/null +++ b/arch/arm/mach-uniphier/arm32/psci_smp.S @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/linkage.h> +#include <asm/system.h> + + .section ._secure.text, "ax" + +ENTRY(uniphier_smp_trampoline) + ldr r0, 0f + mrc p15, 0, r1, c1, c0, 0 @ SCTLR (System Control Register) + orr r1, r1, #CR_I @ Enable ICache + bic r1, r1, #(CR_C | CR_M) @ Disable MMU and Dcache + mcr p15, 0, r1, c1, c0, 0 + + bx r0 +0: .word uniphier_secondary_startup + .globl uniphier_smp_trampoline_end +uniphier_smp_trampoline_end: +ENDPROC(uniphier_smp_trampoline) + +LENTRY(uniphier_secondary_startup) + mrc p15, 0, r1, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Reg) + and r1, r1, #0xff + + ldr r2, =uniphier_smp_booted + mov r0, #1 + str r0, [r2, r1, lsl #2] + + ldr r2, =uniphier_psci_holding_pen_release +pen: ldr r0, [r2] + cmp r0, r1 + beq psci_cpu_entry + wfe + b pen +ENDPROC(uniphier_secondary_startup) |