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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-27 23:47:04 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-29 17:24:30 +0900
commita8b66ac87cc1d6ffd1b3693514e60edcf61fb678 (patch)
tree5ce12c52834a2a36021fce97aae68321a1dba22d /arch/arm/mach-uniphier/dram/umc-sld8.c
parentefaa22e42686ce24fe0304d2e5f2cbb91c5558e9 (diff)
ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8
The status register should be polled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/dram/umc-sld8.c')
-rw-r--r--arch/arm/mach-uniphier/dram/umc-sld8.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/dram/umc-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c
index 61b1dc1a3a..568a007206 100644
--- a/arch/arm/mach-uniphier/dram/umc-sld8.c
+++ b/arch/arm/mach-uniphier/dram/umc-sld8.c
@@ -152,7 +152,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,
int ret;
writel(UMC_INITSET_INIT1EN, dc_base + UMC_INITSET);
- while (readl(dc_base + UMC_INITSET) & UMC_INITSTAT_INIT1ST)
+ while (readl(dc_base + UMC_INITSTAT) & UMC_INITSTAT_INIT1ST)
cpu_relax();
writel(0x00000101, dc_base + UMC_DIOCTLA);