diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-28 15:37:15 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-01 01:09:18 +0900 |
| commit | 5eb4150e84e55057a3504b2cb06d7f5c145c866f (patch) | |
| tree | 469579582c630c401ac7c21989c79aee39a80370 /arch/arm/mach-uniphier/early-pinctrl | |
| parent | 1dce5eb9de72eff89a42546186d511f24835816d (diff) | |
ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20
The System Bus is not available by default on the ROM boot mode of
PH1-LD20. To use devices connected to the System Bus, such as the
Micro Support Card, it is necessary to set up pin-muxing and some
System Bus Controller register.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/early-pinctrl')
| -rw-r--r-- | arch/arm/mach-uniphier/early-pinctrl/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c | 32 |
2 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile index dc4064c05b..a1039025ca 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/Makefile +++ b/arch/arm/mach-uniphier/early-pinctrl/Makefile @@ -3,3 +3,4 @@ # obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-pinctrl-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-pinctrl-ld20.o diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c new file mode 100644 index 0000000000..537deaf232 --- /dev/null +++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ld20.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "../init.h" +#include "../sg-regs.h" + +int uniphier_ld20_early_pin_init(const struct uniphier_board_data *bd) +{ + /* Comment format: PAD Name -> Function Name */ + sg_set_pinsel(0, 0, 8, 4); /* XECS1 -> XECS1 */ + sg_set_pinsel(1, 0, 8, 4); /* ERXW -> ERXW */ + sg_set_pinsel(2, 0, 8, 4); /* XERWE1 -> XERWE1 */ + sg_set_pinsel(6, 2, 8, 4); /* XNFRE -> XERWE0 */ + sg_set_pinsel(7, 2, 8, 4); /* XNFWE -> ES0 */ + sg_set_pinsel(8, 2, 8, 4); /* NFALE -> ES1 */ + sg_set_pinsel(9, 2, 8, 4); /* NFCLE -> ES2 */ + sg_set_pinsel(10, 2, 8, 4); /* NFD0 -> ED0 */ + sg_set_pinsel(11, 2, 8, 4); /* NFD1 -> ED1 */ + sg_set_pinsel(12, 2, 8, 4); /* NFD2 -> ED2 */ + sg_set_pinsel(13, 2, 8, 4); /* NFD3 -> ED3 */ + sg_set_pinsel(14, 2, 8, 4); /* NFD4 -> ED4 */ + sg_set_pinsel(15, 2, 8, 4); /* NFD5 -> ED5 */ + sg_set_pinsel(16, 2, 8, 4); /* NFD6 -> ED6 */ + sg_set_pinsel(17, 2, 8, 4); /* NFD7 -> ED7 */ + sg_set_iectrl_range(0, 2); + sg_set_iectrl_range(6, 17); + + return 0; +} |