diff options
| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-27 02:26:53 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-03-01 00:02:45 +0900 |
| commit | 42ca6982ff932b2f972bdaeb076ea4ce519a1117 (patch) | |
| tree | c324ae9314806bf82e4a96ebf1ad1f906d6af6fc /arch/arm/mach-uniphier/include/mach | |
| parent | d3384bf77eb9a202d8218e1fe1da2f21af034aa7 (diff) | |
ARM: UniPhier: enable STDMAC for EHCI
Deassert the reset signal and provide the clock for STDMAC core.
This is necessary for the USB 2.0 host controllers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/mach-uniphier/include/mach')
| -rw-r--r-- | arch/arm/mach-uniphier/include/mach/sc-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index 7726530f0b..f0467bbde3 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -39,6 +39,7 @@ #define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) +#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10) #define SC_RSTCTRL_NRST_UMC1 (0x1 << 5) #define SC_RSTCTRL_NRST_UMC0 (0x1 << 4) #define SC_RSTCTRL_NRST_NAND (0x1 << 2) @@ -49,6 +50,7 @@ #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) #define SC_CLKCTRL_CEN_ETHER (0x1 << 12) #define SC_CLKCTRL_CEN_MIO (0x1 << 11) +#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10) #define SC_CLKCTRL_CEN_UMC (0x1 << 4) #define SC_CLKCTRL_CEN_NAND (0x1 << 2) #define SC_CLKCTRL_CEN_SBC (0x1 << 1) |