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authorPeng Fan <Peng.Fan@freescale.com>2015-08-06 17:54:13 +0800
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2015-09-12 09:03:39 +0200
commit208bd51396fb606dbdcf45b064e6b372d7dd3e81 (patch)
treeea9d416358bda1ddc49af8e8a10ad741f89b1d8a /arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c
parented64190f67a28e9830371d424998b8aa924be9f3 (diff)
arm: armv8 correct value passed to __asm_dcache_all
>From source code comments: "x0: 0 flush & invalidate, 1 invalidate only" Current value 0xffff can make invalidate work, since we only judge whether input value is 0 or not, see following code: " tbz w1, #0, 1f dc isw, x9 b 2f 1: dc cisw, x9 /* clean & invalidate by set/way */ 2: subs x6, x6, #1 /* decrement the way */ " Later we may add "2 clean only" support. So following the comments, correct value from 0xffff to 1. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c')
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