diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-10 20:07:41 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-10 22:42:02 +0900 |
| commit | 739ba41d5a0964a9bc0d5705055ddb706d7e070d (patch) | |
| tree | 8102586f592acf93236ca9acd4336a8c82a1e0b4 /arch/arm/mach-uniphier/reset.c | |
| parent | d41b358fb331c2907f1f217686d38eeaf17eece4 (diff) | |
ARM: uniphier: de-couple SC macros into base address and offset
The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/reset.c')
| -rw-r--r-- | arch/arm/mach-uniphier/reset.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c index 28c95e2ce5..31685d0009 100644 --- a/arch/arm/mach-uniphier/reset.c +++ b/arch/arm/mach-uniphier/reset.c @@ -22,14 +22,14 @@ void __SECURE reset_cpu(unsigned long ignored) { u32 tmp; - writel(5, SC_IRQTIMSET); /* default value */ + writel(5, sc_base + SC_IRQTIMSET); /* default value */ - tmp = readl(SC_SLFRSTSEL); + tmp = readl(sc_base + SC_SLFRSTSEL); tmp &= ~0x3; /* mask [1:0] */ tmp |= 0x0; /* XRST reboot */ - writel(tmp, SC_SLFRSTSEL); + writel(tmp, sc_base + SC_SLFRSTSEL); - tmp = readl(SC_SLFRSTCTL); + tmp = readl(sc_base + SC_SLFRSTCTL); tmp |= 0x1; - writel(tmp, SC_SLFRSTCTL); + writel(tmp, sc_base + SC_SLFRSTCTL); } |