summaryrefslogtreecommitdiff
path: root/arch/arm/mach-zynq
diff options
context:
space:
mode:
authorMarek Vasut <marek.vasut@gmail.com>2020-04-04 12:45:06 +0200
committerPeng Fan <peng.fan@nxp.com>2020-04-22 20:41:56 +0800
commit4a66d4ee336048b51bf5701a2abfac9a79c5a860 (patch)
tree5a9f10080a88f0836f44b7a0164ff62496105a51 /arch/arm/mach-zynq
parent145429aac05b399c3543ebb86799f4ed753328c4 (diff)
mmc: tmio: sdhi: Implement get_b_max function
Implement get_b_max() for the Renesas R-Car SDHI controller driver, limit the b_max per hardware capabilities such that select Gen2 controllers have 16bit block transfer limit, the rest has 32bit block transfer limit and on Gen3, the block transfer limit on addresses above the 32bit boundary is set to 1/4 of the malloc area. Originally, on Gen3, the block transfers above the 32bit area were limited to PIO only, which resulted in (R8A7795 Salvator-X , HS200 eMMC): => time mmc read 0x0000000700000000 0 0x10000 time: 0.151 seconds => time mmc read 0x0000000700000000 0 0x100000 time: 11.090 seconds with bounce buffer in place and b_max adjustment in place: => time mmc read 0x0000000700000000 0 0x10000 time: 0.156 seconds => time mmc read 0x0000000700000000 0 0x100000 time: 2.349 seconds Note that the bounce buffer does mallocate and free the bounce buffer for every transfer. Experiment which removes this results in further increase of read speed, from 2.349s to 2.156s per 512 MiB of data, which is not such a significant improvement anymore. It might however be interesting to have bounce buffer directly in the MMC core or even block core. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/mach-zynq')
0 files changed, 0 insertions, 0 deletions