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authorTom Rini <trini@konsulko.com>2019-01-24 10:47:05 -0500
committerTom Rini <trini@konsulko.com>2019-01-24 10:47:05 -0500
commitce0d1e48165fdd3bde4bb431f1d2e100b1617a6e (patch)
tree8b30f2052d732ae7cfae221be6a9287f87e1de78 /arch/arm/mach-zynqmp/include/mach/clk.h
parentaff66f22d6eeb27c6329c0a3c1ebc52914c8affa (diff)
parent4efdbc88b79bd8bd3e285cd238e1942d669a7088 (diff)
Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04 tools: - Fix zynqmpimage generation zynq: - Some configs/Kconfig/DT updates - Enable REMAKE_ELF and OF_SEPARATE - Topic boards update - i2c cleanups and conversion to DM_I2C zynqmp: - Some configs/Kconfig/DT updates - Board config cleanup - Move arch folder to mach-zynqmp versal: - Enable DM_I2C, CMD_DM zynq-gem: - Fix driver cache handling i2c: - Live tree simple update phy: - Fixed phy cleanup travis: - Wire Versal SoC
Diffstat (limited to 'arch/arm/mach-zynqmp/include/mach/clk.h')
-rw-r--r--arch/arm/mach-zynqmp/include/mach/clk.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-zynqmp/include/mach/clk.h b/arch/arm/mach-zynqmp/include/mach/clk.h
new file mode 100644
index 0000000000..cfd44c8e0f
--- /dev/null
+++ b/arch/arm/mach-zynqmp/include/mach/clk.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2014 - 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#ifndef _ASM_ARCH_CLK_H_
+#define _ASM_ARCH_CLK_H_
+
+unsigned long zynqmp_get_system_timer_freq(void);
+
+#endif /* _ASM_ARCH_CLK_H_ */