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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2017-01-16 17:31:47 +0800
committerYork Sun <york.sun@nxp.com>2017-01-18 09:35:53 -0800
commit0897eb2ced0579ee58b7d50076faa93605e33ed1 (patch)
treeed6a65003b36e416639568beb99c1f699268d838 /arch/arm
parent7c5e1feb1d780cc857632c246e78ac7a8e6cf2d7 (diff)
kconfig: armv8: move armv8 sec_firmware CONFIG_* to Kconfig
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York S: clean up scripts/config_whitelist.txt] Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv8/Kconfig33
-rw-r--r--arch/arm/cpu/armv8/Makefile2
-rw-r--r--arch/arm/cpu/armv8/sec_firmware_asm.S4
3 files changed, 36 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 472b2ba188..7ef9c2fc52 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -39,6 +39,39 @@ config ARMV8_SPIN_TABLE
- Reserve the code for the spin-table and the release address
via a /memreserve/ region in the Device Tree.
+menu "ARMv8 secure monitor firmware"
+config ARMV8_SEC_FIRMWARE_SUPPORT
+ bool "Enable ARMv8 secure monitor firmware framework support"
+ select OF_LIBFDT
+ select FIT
+ help
+ This framework is aimed at making secure monitor firmware load
+ process brief.
+ Note: Only FIT format image is supported.
+ You should prepare and provide the below information:
+ - Address of secure firmware.
+ - Address to hold the return address from secure firmware.
+ - Secure firmware FIT image related information.
+ Such as: SEC_FIRMWARE_FIT_IMAGE and SEC_FIRMEWARE_FIT_CNF_NAME
+ - The target exception level that secure monitor firmware will
+ return to.
+
+config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
+ bool "Enable ARMv8 secure monitor firmware framework support for SPL"
+ select SPL_OF_LIBFDT
+ select SPL_FIT
+ help
+ Say Y here to support this framework in SPL phase.
+
+config ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
+ bool "ARMv8 secure monitor firmware ERET address byteorder swap"
+ depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT
+ help
+ Say Y here when the endianness of the register or memory holding the
+ Secure firmware exception return address is different with core's.
+
+endmenu
+
config PSCI_RESET
bool "Use PSCI for reset and shutdown"
default y
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 28ba786207..1f1de4aa9a 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -19,7 +19,7 @@ obj-y += cpu-dt.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
endif
-obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
+obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
obj-$(CONFIG_S32V234) += s32v234/
diff --git a/arch/arm/cpu/armv8/sec_firmware_asm.S b/arch/arm/cpu/armv8/sec_firmware_asm.S
index 5ed3677f55..3275e95c58 100644
--- a/arch/arm/cpu/armv8/sec_firmware_asm.S
+++ b/arch/arm/cpu/armv8/sec_firmware_asm.S
@@ -23,12 +23,12 @@ WEAK(_sec_firmware_entry)
/* Set exception return address hold pointer */
adr x4, 1f
mov x3, x4
-#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
rev w3, w3
#endif
str w3, [x1]
lsr x3, x4, #32
-#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
rev w3, w3
#endif
str w3, [x2]