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authorThierry Reding <treding@nvidia.com>2014-12-09 22:25:19 -0700
committerTom Warren <twarren@nvidia.com>2014-12-18 13:19:21 -0700
commit12e5f6acda010a03a5b1de1d480bf5615571bbc1 (patch)
treed1315695f10b46c7e2420c21b2e47fb70b07cde4 /arch/arm
parentaffe026928db2f1579261ca3b80fe28b6b9f3765 (diff)
ARM: tegra: Add GIC for Tegra124
Add a device tree node for the GIC v2 found on the Cortex-A15 CPU complex of Tegra124. U-Boot doesn't use this but subsequent patches will add device tree nodes that reference it by phandle. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/tegra124.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index 894b347ce6..a899d54e28 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -8,6 +8,19 @@
/ {
compatible = "nvidia,tegra124";
+ interrupt-parent = <&gic>;
+
+ gic: interrupt-controller@50041000 {
+ compatible = "arm,cortex-a15-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x50041000 0x1000>,
+ <0x50042000 0x2000>,
+ <0x50044000 0x2000>,
+ <0x50046000 0x2000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
tegra_car: clock@60006000 {
compatible = "nvidia,tegra124-car";