diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2019-07-09 22:00:31 +0800 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 23:59:44 +0800 |
| commit | 192445b39c0e852f7f2c054c935bbe02f7a8ea22 (patch) | |
| tree | 26b170a39cec40e0bcf4f0e353c95e1fa80b4a13 /arch/arm | |
| parent | 1f6b599b6d2479ad51981bc753abcaed25907f8b (diff) | |
rockchip: rk3368: enable stimer for rk3368
Add stimer_init() for spl/tpl so that we able to switch
to use arch timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-rockchip/rk3368-board-spl.c | 27 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3368-board-tpl.c | 21 |
2 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c index 3a7d0b640a..6ba106c63b 100644 --- a/arch/arm/mach-rockchip/rk3368-board-spl.c +++ b/arch/arm/mach-rockchip/rk3368-board-spl.c @@ -16,6 +16,28 @@ __weak int arch_cpu_init(void) return 0; } +#define TIMER_LOAD_COUNT_L 0x00 +#define TIMER_LOAD_COUNT_H 0x04 +#define TIMER_CONTROL_REG 0x10 +#define TIMER_EN 0x1 +#define TIMER_FMODE BIT(0) +#define TIMER_RMODE BIT(1) + +void rockchip_stimer_init(void) +{ + /* If Timer already enabled, don't re-init it */ + u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + + if (reg & TIMER_EN) + return; + + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); + writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + + TIMER_CONTROL_REG); +} + void board_init_f(ulong dummy) { struct udevice *dev; @@ -27,6 +49,11 @@ void board_init_f(ulong dummy) hang(); } + /* Init secure timer */ + rockchip_stimer_init(); + /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ + timer_init(); + arch_cpu_init(); preloader_console_init(); diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c index a1da8ccb0f..fdb1c3b365 100644 --- a/arch/arm/mach-rockchip/rk3368-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c @@ -11,6 +11,22 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> +#define TIMER_LOAD_COUNT_L 0x00 +#define TIMER_LOAD_COUNT_H 0x04 +#define TIMER_CONTROL_REG 0x10 +#define TIMER_EN 0x1 +#define TIMER_FMODE BIT(0) +#define TIMER_RMODE BIT(1) + +__weak void rockchip_stimer_init(void) +{ + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); + writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + + TIMER_CONTROL_REG); +} + void board_init_f(ulong dummy) { struct udevice *dev; @@ -35,6 +51,11 @@ void board_init_f(ulong dummy) hang(); } + /* Init secure timer */ + rockchip_stimer_init(); + /* Init ARM arch timer in arch/arm/cpu/ */ + timer_init(); + ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { debug("DRAM init failed: %d\n", ret); |