diff options
| author | Christoph Niedermaier <cniedermaier@dh-electronics.de> | 2018-10-19 17:40:54 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-11-08 14:35:40 +0100 |
| commit | 19bbd098254fefd94199001e721f92f167f7ed9e (patch) | |
| tree | 49203dd0de3a505bf66f6f54d45da86d18ba42dc /arch/arm | |
| parent | c5bbfaf05dc8592b479a44df6abaadbab54fec2b (diff) | |
imx: imx6: perform gpr_init only on suitable cpu types
If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-imx/mx6/soc.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 31c9a6e4e3..e80f1d484b 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -660,6 +660,14 @@ void gpr_init(void) { struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + /* + * If this function is used in a common MX6 spl implementation + * we have to ensure that it is only called for suitable cpu types, + * otherwise it breaks hardware parts like enet1, can1, can2, etc. + */ + if (!is_mx6dqp() && !is_mx6dq() && !is_mx6sdl()) + return; + /* enable AXI cache for VDOA/VPU/IPU */ writel(0xF00000CF, &iomux->gpr[4]); if (is_mx6dqp()) { |