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authorTom Rini <trini@konsulko.com>2016-01-27 15:05:12 -0500
committerTom Rini <trini@konsulko.com>2016-01-27 15:05:12 -0500
commit19bde0316f2c58b3ab6357832790aee6ed7a4ad5 (patch)
tree8216f416e21cf71745abaec2c5a42ab9824b290e /arch/arm
parentb20c38a973a51bf3f663bd298c63ad1b8e0de445 (diff)
parentf36919a8138ed7ecd3dbce4630e02936b13907da (diff)
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig6
-rw-r--r--arch/arm/cpu/armv8/zynqmp/Kconfig4
-rw-r--r--arch/arm/cpu/armv8/zynqmp/clk.c20
-rw-r--r--arch/arm/cpu/armv8/zynqmp/cpu.c18
-rw-r--r--arch/arm/dts/zynq-7000.dtsi10
-rw-r--r--arch/arm/dts/zynq-zc770-xm010.dts5
-rw-r--r--arch/arm/dts/zynq-zc770-xm011.dts17
-rw-r--r--arch/arm/dts/zynq-zc770-xm012.dts17
-rw-r--r--arch/arm/dts/zynq-zc770-xm013.dts35
-rw-r--r--arch/arm/dts/zynqmp-ep108.dts2
-rw-r--r--arch/arm/dts/zynqmp.dtsi6
-rw-r--r--arch/arm/include/asm/arch-zynqmp/clk.h1
-rw-r--r--arch/arm/include/asm/arch-zynqmp/hardware.h30
-rw-r--r--arch/arm/mach-zynq/ddrc.c2
14 files changed, 109 insertions, 64 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 876a620cf1..d2dbb1a5c2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -558,15 +558,15 @@ config ARCH_ZYNQ
select CPU_V7
select SUPPORT_SPL
select OF_CONTROL
- select SPL_OF_CONTROL
+ select SPL_OF_CONTROL if SPL
select DM
select DM_ETH
- select SPL_DM
+ select SPL_DM if SPL
select DM_MMC
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
- select SPL_SEPARATE_BSS
+ select SPL_SEPARATE_BSS if SPL
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index e5a4fdd0fd..9a19dfa77f 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -20,10 +20,6 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "xilinx_zynqmp_ep" if TARGET_ZYNQMP_EP
-config SECURE_IOU
- bool "Configure ZynqMP secure IOU"
- default n
-
config ZYNQMP_USB
bool "Configure ZynqMP USB"
diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c
index 9218586e94..690c72dd66 100644
--- a/arch/arm/cpu/armv8/zynqmp/clk.c
+++ b/arch/arm/cpu/armv8/zynqmp/clk.c
@@ -21,9 +21,27 @@ unsigned long get_uart_clk(int dev_id)
return 48000;
case ZYNQMP_CSU_VERSION_EP108:
return 25000000;
+ case ZYNQMP_CSU_VERSION_QEMU:
+ return 133000000;
}
- return 133000000;
+ return 100000000;
+}
+
+unsigned long zynqmp_get_system_timer_freq(void)
+{
+ u32 ver = zynqmp_get_silicon_version();
+
+ switch (ver) {
+ case ZYNQMP_CSU_VERSION_VELOCE:
+ return 10000;
+ case ZYNQMP_CSU_VERSION_EP108:
+ return 4000000;
+ case ZYNQMP_CSU_VERSION_QEMU:
+ return 50000000;
+ }
+
+ return 100000000;
}
#ifdef CONFIG_CLOCKS
diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index f90cca36aa..c71f29152d 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -15,8 +15,22 @@
DECLARE_GLOBAL_DATA_PTR;
+static unsigned int zynqmp_get_silicon_version_secure(void)
+{
+ u32 ver;
+
+ ver = readl(&csu_base->version);
+ ver &= ZYNQMP_SILICON_VER_MASK;
+ ver >>= ZYNQMP_SILICON_VER_SHIFT;
+
+ return ver;
+}
+
unsigned int zynqmp_get_silicon_version(void)
{
+ if (current_el() == 3)
+ return zynqmp_get_silicon_version_secure();
+
gd->cpu_clk = get_tbclk();
switch (gd->cpu_clk) {
@@ -24,9 +38,11 @@ unsigned int zynqmp_get_silicon_version(void)
return ZYNQMP_CSU_VERSION_VELOCE;
case 50000000:
return ZYNQMP_CSU_VERSION_QEMU;
+ case 4000000:
+ return ZYNQMP_CSU_VERSION_EP108;
}
- return ZYNQMP_CSU_VERSION_EP108;
+ return ZYNQMP_CSU_VERSION_SILICON;
}
#ifndef CONFIG_SYS_DCACHE_OFF
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 83be51ae9d..2d786f0fd1 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -234,7 +234,7 @@
interrupt-parent = <&intc>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
- } ;
+ };
sdhci1: sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
@@ -244,7 +244,7 @@
interrupt-parent = <&intc>;
interrupts = <0 47 4>;
reg = <0xe0101000 0x1000>;
- } ;
+ };
slcr: slcr@f8000000 {
#address-cells = <1>;
@@ -326,11 +326,11 @@
scutimer: timer@f8f00600 {
interrupt-parent = <&intc>;
- interrupts = < 1 13 0x301 >;
+ interrupts = <1 13 0x301>;
compatible = "arm,cortex-a9-twd-timer";
- reg = < 0xf8f00600 0x20 >;
+ reg = <0xf8f00600 0x20>;
clocks = <&clkc 4>;
- } ;
+ };
usb0: usb@e0002000 {
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts
index 07e2b7a738..b6982c0c45 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -21,9 +21,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts
index 77e3bb0e63..4fed221536 100644
--- a/arch/arm/dts/zynq-zc770-xm011.dts
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -18,9 +18,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
@@ -34,12 +33,6 @@
};
};
-&spi0 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
-};
-
&can0 {
status = "okay";
};
@@ -54,6 +47,12 @@
};
};
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts
index 3e1769acb5..8d69f0e0f5 100644
--- a/arch/arm/dts/zynq-zc770-xm012.dts
+++ b/arch/arm/dts/zynq-zc770-xm012.dts
@@ -20,9 +20,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart1;
- stdout-path = &uart1;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
@@ -31,12 +30,6 @@
};
};
-&spi1 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
-};
-
&can1 {
status = "okay";
};
@@ -61,6 +54,12 @@
};
};
+&spi1 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts
index 288e248374..77fdfcc009 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -20,9 +20,8 @@
};
chosen {
- bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
- linux,stdout-path = &uart0;
- stdout-path = &uart0;
+ bootargs = "root=/dev/ram rw earlyprintk";
+ stdout-path = "serial0:115200n8";
};
memory {
@@ -31,21 +30,6 @@
};
};
-&spi0 {
- status = "okay";
- num-cs = <4>;
- is-decoded-cs = <0>;
- eeprom: at25@0 {
- at25,byte-len = <8192>;
- at25,addr-mode = <2>;
- at25,page-size = <32>;
-
- compatible = "atmel,at25";
- reg = <2>;
- spi-max-frequency = <1000000>;
- };
-};
-
&can1 {
status = "okay";
};
@@ -74,6 +58,21 @@
};
};
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+ eeprom: at25@0 {
+ at25,byte-len = <8192>;
+ at25,addr-mode = <2>;
+ at25,page-size = <32>;
+
+ compatible = "atmel,at25";
+ reg = <2>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
&uart0 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index 4481bd07c9..754604ea72 100644
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -41,7 +41,7 @@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: phy@0{
+ phy0: phy@0 {
reg = <0>;
max-speed = <100>;
};
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 24a34e6d85..8733604a57 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -520,7 +520,7 @@
};
uart0: serial@ff000000 {
- compatible = "cdns,uart-r1p8";
+ compatible = "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 21 4>;
@@ -529,7 +529,7 @@
};
uart1: serial@ff010000 {
- compatible = "cdns,uart-r1p8";
+ compatible = "cdns,uart-r1p12";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 22 4>;
@@ -559,7 +559,7 @@
compatible = "cdns,wdt-r1p2";
status = "disabled";
interrupt-parent = <&gic>;
- interrupts = <0 52 1>;
+ interrupts = <0 113 1>;
reg = <0x0 0xfd4d0000 0x1000>;
timeout-sec = <10>;
};
diff --git a/arch/arm/include/asm/arch-zynqmp/clk.h b/arch/arm/include/asm/arch-zynqmp/clk.h
index d55bc31c43..b18333d1ca 100644
--- a/arch/arm/include/asm/arch-zynqmp/clk.h
+++ b/arch/arm/include/asm/arch-zynqmp/clk.h
@@ -9,5 +9,6 @@
#define _ASM_ARCH_CLK_H_
unsigned long get_uart_clk(int dev_id);
+unsigned long zynqmp_get_system_timer_freq(void);
#endif /* _ASM_ARCH_CLK_H_ */
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index bbf89d9dd7..587938249e 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -41,11 +41,8 @@ struct crlapb_regs {
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
-#if defined(CONFIG_SECURE_IOU)
-#define ZYNQMP_IOU_SCNTR 0xFF260000
-#else
+#define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000
#define ZYNQMP_IOU_SCNTR 0xFF250000
-#endif
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2
@@ -57,9 +54,21 @@ struct iou_scntr {
#define iou_scntr ((struct iou_scntr *)ZYNQMP_IOU_SCNTR)
+struct iou_scntr_secure {
+ u32 counter_control_register;
+ u32 reserved0[7];
+ u32 base_frequency_id_register;
+};
+
+#define iou_scntr_secure ((struct iou_scntr_secure *)ZYNQMP_IOU_SCNTR_SECURE)
+
/* Bootmode setting values */
#define BOOT_MODES_MASK 0x0000000F
-#define SD_MODE 0x00000003
+#define QSPI_MODE_24BIT 0x00000001
+#define QSPI_MODE_32BIT 0x00000002
+#define SD_MODE 0x00000003 /* sd 0 */
+#define SD_MODE1 0x00000005 /* sd 1 */
+#define NAND_MODE 0x00000004
#define EMMC_MODE 0x00000006
#define JTAG_MODE 0x00000000
@@ -106,9 +115,20 @@ struct apu_regs {
#define apu_base ((struct apu_regs *)ZYNQMP_APU_BASEADDR)
/* Board version value */
+#define ZYNQMP_CSU_BASEADDR 0xFFCA0000
#define ZYNQMP_CSU_VERSION_SILICON 0x0
#define ZYNQMP_CSU_VERSION_EP108 0x1
#define ZYNQMP_CSU_VERSION_VELOCE 0x2
#define ZYNQMP_CSU_VERSION_QEMU 0x3
+#define ZYNQMP_SILICON_VER_MASK 0xF000
+#define ZYNQMP_SILICON_VER_SHIFT 12
+
+struct csu_regs {
+ u32 reserved0[17];
+ u32 version;
+};
+
+#define csu_base ((struct csu_regs *)ZYNQMP_CSU_BASEADDR)
+
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c
index 5b20accbcb..d74f8dbbc4 100644
--- a/arch/arm/mach-zynq/ddrc.c
+++ b/arch/arm/mach-zynq/ddrc.c
@@ -42,8 +42,6 @@ void zynq_ddrc_init(void)
*/
/* cppcheck-suppress nullPointer */
memset((void *)0, 0, 1 * 1024 * 1024);
-
- gd->ram_size /= 2;
} else {
puts("ECC disabled ");
}