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authorThomas Hebb <tommyhebb@gmail.com>2019-11-15 08:48:55 -0800
committerKever Yang <kever.yang@rock-chips.com>2019-11-17 18:51:25 +0800
commit220697a3174c080dd45c0435f5c9e78fb2de8299 (patch)
treea3b359cace2435b0f1daa30c32ea8d6dce44c60b /arch/arm
parent7f08bfb74f0417c5791787c8adb7c7d2217d8492 (diff)
rockchip: SPL: fix ordering of DRAM init
The common SPL code reordered the DRAM initialization before rockchip_stimer_init(), which as far as I can tell causes the RK3399 to lock up completely. Fix this issue in the common code by putting the DRAM init back after timer init. I have only tested this on the RK3399, but it wouldn't make any sense for the timer init to require DRAM be set up on any system. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-rockchip/spl.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 57e43c092d..cf089c79a7 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -127,6 +127,13 @@ void board_init_f(ulong dummy)
hang();
}
arch_cpu_init();
+#if !defined(CONFIG_ROCKCHIP_RK3188)
+ rockchip_stimer_init();
+#endif
+#ifdef CONFIG_SYS_ARCH_TIMER
+ /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+ timer_init();
+#endif
#if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
debug("\nspl:init dram\n");
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
@@ -135,13 +142,6 @@ void board_init_f(ulong dummy)
return;
}
#endif
-#if !defined(CONFIG_ROCKCHIP_RK3188)
- rockchip_stimer_init();
-#endif
-#ifdef CONFIG_SYS_ARCH_TIMER
- /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
- timer_init();
-#endif
preloader_console_init();
}