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authorJagan Teki <jagan@amarulasolutions.com>2019-07-15 23:51:05 +0530
committerKever Yang <kever.yang@rock-chips.com>2019-07-19 11:11:09 +0800
commit355490dc5c03f42033efd55940d3a6192b70656d (patch)
treea2101bd9495a44f66607f52db29805f0411c29a5 /arch/arm
parent9c4d517db8d15e56fe2316c0763bdc8009cac872 (diff)
ram: rockchip: rk3399: Add cap_info structure
Group common ddr attributes like - rank - col - bk - bw - dbw - row_3_4 - cs0_row - cs1_row - ddrconfig into a common cap_info structure for more code readability and extend if possible based on the new features. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-rockchip/sdram_rk3399.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index c6a260bad8..683093d4ca 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -71,7 +71,7 @@ struct rk3399_ddr_cic_regs {
/* DENALI_CTL_274 */
#define MEM_RST_VALID 1
-struct rk3399_sdram_channel {
+struct sdram_cap_info {
unsigned int rank;
/* dram column number, 0 means this channel is invalid */
unsigned int col;
@@ -89,6 +89,10 @@ struct rk3399_sdram_channel {
unsigned int cs0_row;
unsigned int cs1_row;
unsigned int ddrconfig;
+};
+
+struct rk3399_sdram_channel {
+ struct sdram_cap_info cap_info;
struct rk3399_msch_timings noc_timings;
};