diff options
author | Steve Sakoman <steve@sakoman.com> | 2010-08-25 13:22:44 -0700 |
---|---|---|
committer | Sandeep Paulraj <s-paulraj@ti.com> | 2010-09-08 14:51:18 -0400 |
commit | 543431b66dd9f3526f23546cac962c29ad0f485a (patch) | |
tree | 139fd7de177b6c747fdfc3bd3d80b7e96a5ca313 /arch/arm | |
parent | 0c0a0e07811965188d5f64cdbc186331c0598fa6 (diff) |
ARMV7: OMAP3: Fix broken reset command on OMAP36XX/37XX and OMAP4
Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This
patch uses the reset bit appropriate for each CPU architecture.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/reset.S | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap3/cpu.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap4/omap4.h | 1 |
3 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S index a53c408195..838b1221ee 100644 --- a/arch/arm/cpu/armv7/omap-common/reset.S +++ b/arch/arm/cpu/armv7/omap-common/reset.S @@ -27,10 +27,12 @@ reset_cpu: ldr r1, rstctl @ get addr for global reset @ reg - mov r3, #0x2 @ full reset pll + mpu + ldr r3, rstbit @ sw reset bit str r3, [r1] @ force reset mov r0, r0 _loop_forever: b _loop_forever rstctl: .word PRM_RSTCTRL +rstbit: + .word PRM_RSTCTRL_RESET diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h index 99da756bc2..962d6d40aa 100644 --- a/arch/arm/include/asm/arch-omap3/cpu.h +++ b/arch/arm/include/asm/arch-omap3/cpu.h @@ -419,6 +419,7 @@ struct prm { }; #else /* __ASSEMBLY__ */ #define PRM_RSTCTRL 0x48307250 +#define PRM_RSTCTRL_RESET 0x04 #endif /* __ASSEMBLY__ */ #endif /* __KERNEL_STRICT_NAMES */ diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h index 79ff22cf31..d0c808d121 100644 --- a/arch/arm/include/asm/arch-omap4/omap4.h +++ b/arch/arm/include/asm/arch-omap4/omap4.h @@ -88,6 +88,7 @@ #define PRM_DEVICE_BASE (PRM_BASE + 0x1B00) #define PRM_RSTCTRL PRM_DEVICE_BASE +#define PRM_RSTCTRL_RESET 0x01 #ifndef __ASSEMBLY__ |