diff options
author | Tom Rini <trini@konsulko.com> | 2017-11-30 10:38:40 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2017-11-30 10:38:40 -0500 |
commit | 55e76b3c86d132ae1ca8f36728efdadef8588740 (patch) | |
tree | 034ae424a1156092a39f63f158f5f73995748149 /arch/arm | |
parent | 6ea51d286093aa21619cc2a55263caf1e9d5f340 (diff) | |
parent | 01c541e0e698196ab29761fd29fd06f36185e03e (diff) |
Merge git://git.denx.de/u-boot-marvell
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/dts/armada-38x.dtsi | 15 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/spl.c | 25 |
3 files changed, 44 insertions, 3 deletions
diff --git a/arch/arm/dts/armada-38x.dtsi b/arch/arm/dts/armada-38x.dtsi index dc8a1a66c1..5e5a158551 100644 --- a/arch/arm/dts/armada-38x.dtsi +++ b/arch/arm/dts/armada-38x.dtsi @@ -258,6 +258,19 @@ marvell,function = "i2c0"; }; + nand_pins: nand-pins { + marvell,pins = "mpp22", "mpp34", "mpp23", "mpp33", + "mpp38", "mpp28", "mpp40", "mpp42", + "mpp35", "mpp36", "mpp25", "mpp30", + "mpp32"; + marvell,function = "dev"; + }; + + nand_rb: nand-rb { + marvell,pins = "mpp41"; + marvell,function = "nand"; + }; + mdio_pins: mdio-pins { marvell,pins = "mpp4", "mpp5"; marvell,function = "ge"; @@ -545,7 +558,7 @@ }; flash@d0000 { - compatible = "marvell,armada370-nand"; + compatible = "marvell,armada370-nand","marvell,mvebu-pxa3xx-nand"; reg = <0xd0000 0x54>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 1d302761f0..1a06a1e876 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -111,10 +111,16 @@ #define COMPHY_REFCLK_ALIGNMENT (MVEBU_REGISTER(0x182f8)) /* BootROM error register (also includes some status infos) */ +#if defined(CONFIG_ARMADA_38X) +#define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) +#define BOOTROM_ERR_MODE_OFFS 0 +#define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) +#else #define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) #define BOOTROM_ERR_MODE_OFFS 28 #define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) #define BOOTROM_ERR_MODE_UART 0x6 +#endif #if defined(CONFIG_ARMADA_375) /* SAR values for Armada 375 */ @@ -141,6 +147,7 @@ #define BOOT_DEV_SEL_OFFS 4 #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) +#define BOOT_FROM_NAND 0x0A #define BOOT_FROM_UART 0x28 #define BOOT_FROM_UART_ALT 0x3f #define BOOT_FROM_SPI 0x32 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index a72a769f7c..d16a62d2dd 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -26,7 +26,16 @@ static u32 get_boot_device(void) val = readl(CONFIG_BOOTROM_ERR_REG); boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); +#if defined(CONFIG_ARMADA_38X) + /* + * If the bootrom error register contains any else than zeros + * in the first 8 bits it's an error condition. And in that case + * try to boot from UART. + */ + if (boot_device) +#else if (boot_device == BOOTROM_ERR_MODE_UART) +#endif return BOOT_DEVICE_UART; /* @@ -36,6 +45,10 @@ static u32 get_boot_device(void) boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); switch (boot_device) { +#if defined(CONFIG_ARMADA_38X) + case BOOT_FROM_NAND: + return BOOT_DEVICE_NAND; +#endif #ifdef CONFIG_SPL_MMC_SUPPORT case BOOT_FROM_MMC: case BOOT_FROM_MMC_ALT: @@ -119,7 +132,15 @@ void board_init_f(ulong dummy) * SPL has no chance to receive this information. So we * need to return to the BootROM to enable this xmodem * UART download. + * + * If booting from NAND lets let the BootROM load the + * rest of the bootloader. */ - if (get_boot_device() == BOOT_DEVICE_UART) - return_to_bootrom(); + switch (get_boot_device()) { + case BOOT_DEVICE_UART: +#if defined(CONFIG_ARMADA_38X) + case BOOT_DEVICE_NAND: +#endif + return_to_bootrom(); + } } |