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authorYork Sun <york.sun@nxp.com>2018-06-26 14:26:02 -0700
committerYork Sun <york.sun@nxp.com>2018-07-26 10:59:35 -0700
commit61ab8aac608a35d814b1b4e17712475ebeb20ccb (patch)
tree36f02d414110ae3d7a955ce2de37e9c4f676a595 /arch/arm
parent02d8dc96784d996dae599010749eb04ca2a6e896 (diff)
armv8: layerscape: Enabled I-cache for SPL boot
Enable I-cache for SPL boot to boost performance. Earlier MMU was enabled only for LS2080A and has since been dropped by commit f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build"). Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/spl.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index dba4b40607..f1d6fd63b9 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -52,6 +52,7 @@ void spl_board_init(void)
void board_init_f(ulong dummy)
{
+ icache_enable();
/* Clear global data */
memset((void *)gd, 0, sizeof(gd_t));
board_early_init_f();