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authorThor Thayer <thor.thayer@linux.intel.com>2019-12-06 13:47:31 -0600
committerMarek Vasut <marex@denx.de>2020-01-07 14:38:34 +0100
commit62079b2211e113f8ee395025d1213f91e1da219e (patch)
tree4bf13f456d8851e5ca56bf4090d2c961ab2fde31 /arch/arm
parentcb068cae0dffd29445a2008ee11def2e4baf316f (diff)
arm: socfpga: stratix10: Enable SMMU access
Enable TCU access through the Stratix10 CCU so that the SMMU can access the SDRAM. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-socfpga/include/mach/firewall.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/firewall.h b/arch/arm/mach-socfpga/include/mach/firewall.h
index 516bd1c0e1..430341bea1 100644
--- a/arch/arm/mach-socfpga/include/mach/firewall.h
+++ b/arch/arm/mach-socfpga/include/mach/firewall.h
@@ -95,6 +95,13 @@ struct socfpga_firwall_l4_sys {
#define CCU_IOM_MPRT_ADMASK_MEM_RAM0 0x18628
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE0 0x2c520
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1A 0x2c540
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1B 0x2c560
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1C 0x2c580
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1D 0x2c5a0
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1E 0x2c5c0
+
#define CCU_ADMASK_P_MASK BIT(0)
#define CCU_ADMASK_NS_MASK BIT(1)