diff options
author | Tom Rini <trini@konsulko.com> | 2018-08-07 11:32:34 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2018-08-07 11:32:34 -0400 |
commit | 63d54c9c598079d3f30efb9e71be8fe5345a451d (patch) | |
tree | a084c5c6ce8111a40acfc21bde7678d198884e10 /arch/arm | |
parent | 373413cce6260acdf14de762f94010b627a77a3b (diff) | |
parent | 79a0188679df53862e06fd7c8fecb7f3d7d44502 (diff) |
Merge git://git.denx.de/u-boot-marvell
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/dts/armada-388-clearfog-u-boot.dtsi | 9 | ||||
-rw-r--r-- | arch/arm/dts/armada-388-clearfog.dts | 449 | ||||
-rw-r--r-- | arch/arm/dts/armada-388-helios4.dts | 8 | ||||
-rw-r--r-- | arch/arm/dts/armada-38x-solidrun-microsom.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts | 145 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/.gitignore | 1 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 17 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/Makefile | 33 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/config.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/kwbimage.cfg.in | 12 |
12 files changed, 375 insertions, 310 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a047552ed3..63ec02403a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1480,7 +1480,6 @@ source "board/freescale/ls1012ardb/Kconfig" source "board/freescale/ls1012afrdm/Kconfig" source "board/freescale/mx35pdk/Kconfig" source "board/freescale/s32v234evb/Kconfig" -source "board/gdsys/a38x/Kconfig" source "board/grinn/chiliboard/Kconfig" source "board/gumstix/pepper/Kconfig" source "board/h2200/Kconfig" diff --git a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi new file mode 100644 index 0000000000..f31691ee94 --- /dev/null +++ b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ + +&spi1 { + u-boot,dm-spl; + + spi-flash@0 { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts index a0b566a5ae..16a47d59e6 100644 --- a/arch/arm/dts/armada-388-clearfog.dts +++ b/arch/arm/dts/armada-388-clearfog.dts @@ -50,6 +50,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include "armada-388.dtsi" +#include "armada-38x-solidrun-microsom.dtsi" / { model = "SolidRun Clearfog A1"; @@ -70,11 +71,6 @@ stdout-path = "serial0:115200n8"; }; - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* 256 MB */ - }; - reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "3P3V"; @@ -84,211 +80,7 @@ }; soc { - ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 - MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 - MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 - MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; - internal-regs { - ethernet@30000 { - mac-address = [00 50 43 02 02 02]; - phy-mode = "sgmii"; - status = "okay"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - ethernet@34000 { - mac-address = [00 50 43 02 02 03]; - managed = "in-band-status"; - phy-mode = "sgmii"; - status = "okay"; - }; - - ethernet@70000 { - mac-address = [00 50 43 02 02 01]; - pinctrl-0 = <&ge0_rgmii_pins>; - pinctrl-names = "default"; - phy = <&phy_dedicated>; - phy-mode = "rgmii-id"; - status = "okay"; - }; - - i2c@11000 { - /* Is there anything on this? */ - clock-frequency = <100000>; - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - status = "okay"; - - /* - * PCA9655 GPIO expander, up to 1MHz clock. - * 0-CON3 CLKREQ# - * 1-CON3 PERST# - * 2-CON2 PERST# - * 3-CON3 W_DISABLE - * 4-CON2 CLKREQ# - * 5-USB3 overcurrent - * 6-USB3 power - * 7-CON2 W_DISABLE - * 8-JP4 P1 - * 9-JP4 P4 - * 10-JP4 P5 - * 11-m.2 DEVSLP - * 12-SFP_LOS - * 13-SFP_TX_FAULT - * 14-SFP_TX_DISABLE - * 15-SFP_MOD_DEF0 - */ - expander0: gpio-expander@20 { - /* - * This is how it should be: - * compatible = "onnn,pca9655", - * "nxp,pca9555"; - * but you can't do this because of - * the way I2C works. - */ - compatible = "nxp,pca9555"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x20>; - - pcie1_0_clkreq { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - input; - line-name = "pcie1.0-clkreq"; - }; - pcie1_0_w_disable { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pcie1.0-w-disable"; - }; - pcie2_0_clkreq { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - input; - line-name = "pcie2.0-clkreq"; - }; - pcie2_0_w_disable { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pcie2.0-w-disable"; - }; - usb3_ilimit { - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - input; - line-name = "usb3-current-limit"; - }; - usb3_power { - gpio-hog; - gpios = <6 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "usb3-power"; - }; - m2_devslp { - gpio-hog; - gpios = <11 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "m.2 devslp"; - }; - }; - - /* The MCP3021 is 100kHz clock only */ - mikrobus_adc: mcp3021@4c { - compatible = "microchip,mcp3021"; - reg = <0x4c>; - }; - - /* Also something at 0x64 */ - }; - - i2c@11100 { - /* - * Routed to SFP, mikrobus, and PCIe. - * SFP limits this to 100kHz, and requires - * an AT24C01A/02/04 with address pins tied - * low, which takes addresses 0x50 and 0x51. - * Mikrobus doesn't specify beyond an I2C - * bus being present. - * PCIe uses ARP to assign addresses, or - * 0x63-0x64. - */ - clock-frequency = <100000>; - pinctrl-0 = <&clearfog_i2c1_pins>; - pinctrl-names = "default"; - status = "okay"; - }; - - mdio@72004 { - pinctrl-0 = <&mdio_pins>; - pinctrl-names = "default"; - - phy_dedicated: ethernet-phy@0 { - /* - * Annoyingly, the marvell phy driver - * configures the LED register, rather - * than preserving reset-loaded setting. - * We undo that rubbish here. - */ - marvell,reg-init = <3 16 0 0x101e>; - reg = <0>; - }; - }; - - pinctrl@18000 { - clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { - marvell,pins = "mpp46"; - marvell,function = "ref"; - }; - clearfog_dsa0_pins: clearfog-dsa0-pins { - marvell,pins = "mpp23", "mpp41"; - marvell,function = "gpio"; - }; - clearfog_i2c1_pins: i2c1-pins { - /* SFP, PCIe, mSATA, mikrobus */ - marvell,pins = "mpp26", "mpp27"; - marvell,function = "i2c1"; - }; - clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { - marvell,pins = "mpp20"; - marvell,function = "gpio"; - }; - clearfog_sdhci_pins: clearfog-sdhci-pins { - marvell,pins = "mpp21", "mpp28", - "mpp37", "mpp38", - "mpp39", "mpp40"; - marvell,function = "sd0"; - }; - clearfog_spi1_cs_pins: spi1-cs-pins { - marvell,pins = "mpp55"; - marvell,function = "spi1"; - }; - mikro_pins: mikro-pins { - /* int: mpp22 rst: mpp29 */ - marvell,pins = "mpp22", "mpp29"; - marvell,function = "gpio"; - }; - mikro_spi_pins: mikro-spi-pins { - marvell,pins = "mpp43"; - marvell,function = "spi1"; - }; - mikro_uart_pins: mikro-uart-pins { - marvell,pins = "mpp24", "mpp25"; - marvell,function = "ua1"; - }; - rear_button_pins: rear-button-pins { - marvell,pins = "mpp34"; - marvell,function = "gpio"; - }; - }; - rtc@a3800 { /* * If the rtc doesn't work, run "date reset" @@ -311,7 +103,7 @@ bus-width = <4>; cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; no-1-8-v; - pinctrl-0 = <&clearfog_sdhci_pins + pinctrl-0 = <µsom_sdhci_pins &clearfog_sdhci_cd_pins>; pinctrl-names = "default"; status = "okay"; @@ -319,13 +111,6 @@ wp-inverted; }; - serial@12000 { - pinctrl-0 = <&uart0_pins>; - pinctrl-names = "default"; - status = "okay"; - u-boot,dm-pre-reloc; - }; - serial@12100 { /* mikrobus uart */ pinctrl-0 = <&mikro_uart_pins>; @@ -342,17 +127,10 @@ pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>; pinctrl-names = "default"; status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "w25q32", "jedec,spi-nor", "spi-flash"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <3000000>; - }; }; - usb3@f8000 { + usb0: usb3@f8000 { + /* CON7, USB-A port on back of device */ status = "okay"; }; }; @@ -376,72 +154,6 @@ }; }; - sfp: sfp { - compatible = "sff,sfp"; - i2c-bus = <&i2c1>; - los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; - moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>; - sfp,ethernet = <ð2>; - tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>; - }; - - dsa@0 { - compatible = "marvell,dsa"; - dsa,ethernet = <ð1>; - dsa,mii-bus = <&mdio>; - pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; - pinctrl-names = "default"; - #address-cells = <2>; - #size-cells = <0>; - - switch@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <4 0>; - - port@0 { - reg = <0>; - label = "lan1"; - }; - - port@1 { - reg = <1>; - label = "lan2"; - }; - - port@2 { - reg = <2>; - label = "lan3"; - }; - - port@3 { - reg = <3>; - label = "lan4"; - }; - - port@4 { - reg = <4>; - label = "lan5"; - }; - - port@5 { - reg = <5>; - label = "cpu"; - }; - - port@6 { - /* 88E1512 external phy */ - reg = <6>; - label = "lan6"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - gpio-keys { compatible = "gpio-keys"; pinctrl-0 = <&rear_button_pins>; @@ -457,6 +169,159 @@ }; }; +&w25q32 { + status = "okay"; +}; + +ð1 { + managed = "in-band-status"; + phy-mode = "sgmii"; + status = "okay"; +}; + +ð2 { + phy-mode = "sgmii"; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* + * PCA9655 GPIO expander, up to 1MHz clock. + * 0-CON3 CLKREQ# + * 1-CON3 PERST# + * 2-CON2 PERST# + * 3-CON3 W_DISABLE + * 4-CON2 CLKREQ# + * 5-USB3 overcurrent + * 6-USB3 power + * 7-CON2 W_DISABLE + * 8-JP4 P1 + * 9-JP4 P4 + * 10-JP4 P5 + * 11-m.2 DEVSLP + * 12-SFP_LOS + * 13-SFP_TX_FAULT + * 14-SFP_TX_DISABLE + * 15-SFP_MOD_DEF0 + */ + expander0: gpio-expander@20 { + /* + * This is how it should be: + * compatible = "onnn,pca9655", + * "nxp,pca9555"; + * but you can't do this because of + * the way I2C works. + */ + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + + pcie1_0_clkreq { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + input; + line-name = "pcie1.0-clkreq"; + }; + pcie1_0_w_disable { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + output-low; + line-name = "pcie1.0-w-disable"; + }; + pcie2_0_clkreq { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + input; + line-name = "pcie2.0-clkreq"; + }; + pcie2_0_w_disable { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-low; + line-name = "pcie2.0-w-disable"; + }; + usb3_ilimit { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + input; + line-name = "usb3-current-limit"; + }; + usb3_power { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "usb3-power"; + }; + m2_devslp { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "m.2 devslp"; + }; + }; + + mikrobus_adc: mcp3021@4c { + compatible = "microchip,mcp3021"; + reg = <0x4c>; + }; +}; + +&i2c1 { + /* + * Routed to SFP, mikrobus, and PCIe. + * SFP limits this to 100kHz, and requires + * an AT24C01A/02/04 with address pins tied + * low, which takes addresses 0x50 and 0x51. + * Mikrobus doesn't specify beyond an I2C + * bus being present. + * PCIe uses ARP to assign addresses, or + * 0x63-0x64. + */ + clock-frequency = <100000>; + pinctrl-0 = <&clearfog_i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pinctrl { + clearfog_i2c1_pins: i2c1-pins { + /* SFP, PCIe, mSATA, mikrobus */ + marvell,pins = "mpp26", "mpp27"; + marvell,function = "i2c1"; + }; + clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + clearfog_spi1_cs_pins: spi1-cs-pins { + marvell,pins = "mpp55"; + marvell,function = "spi1"; + }; + mikro_pins: mikro-pins { + /* int: mpp22 rst: mpp29 */ + marvell,pins = "mpp22", "mpp29"; + marvell,function = "gpio"; + }; + mikro_spi_pins: mikro-spi-pins { + marvell,pins = "mpp43"; + marvell,function = "spi1"; + }; + mikro_uart_pins: mikro-uart-pins { + marvell,pins = "mpp24", "mpp25"; + marvell,function = "ua1"; + }; + rear_button_pins: rear-button-pins { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; +}; + /* +#define A38x_CUSTOMER_BOARD_1_MPP16_23 0x00400011 MPP18: gpio ? (pca9655 int?) diff --git a/arch/arm/dts/armada-388-helios4.dts b/arch/arm/dts/armada-388-helios4.dts index 049d322964..a154e0f4f4 100644 --- a/arch/arm/dts/armada-388-helios4.dts +++ b/arch/arm/dts/armada-388-helios4.dts @@ -248,7 +248,7 @@ bus-width = <4>; cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; no-1-8-v; - pinctrl-0 = <&helios_sdhci_pins + pinctrl-0 = <µsom_sdhci_pins &helios_sdhci_cd_pins>; pinctrl-names = "default"; status = "okay"; @@ -286,12 +286,6 @@ marvell,pins = "mpp20"; marvell,function = "gpio"; }; - helios_sdhci_pins: helios-sdhci-pins { - marvell,pins = "mpp21", "mpp28", - "mpp37", "mpp38", - "mpp39", "mpp40"; - marvell,function = "sd0"; - }; helios_led_pins: helios-led-pins { marvell,pins = "mpp24", "mpp25", "mpp49", "mpp50", diff --git a/arch/arm/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/dts/armada-38x-solidrun-microsom.dtsi index a2627223ce..74f58de85c 100644 --- a/arch/arm/dts/armada-38x-solidrun-microsom.dtsi +++ b/arch/arm/dts/armada-38x-solidrun-microsom.dtsi @@ -86,7 +86,7 @@ w25q32: spi-flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "w25q32", "jedec,spi-nor"; + compatible = "w25q32", "jedec,spi-nor", "spi-flash"; reg = <0>; /* Chip select 0 */ spi-max-frequency = <3000000>; status = "disabled"; diff --git a/arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts b/arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts new file mode 100644 index 0000000000..c234449936 --- /dev/null +++ b/arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-98dx4122.dtsi" + +/ { + model = "Allied Telesis SBx81LIFXCAT Board"; + compatible = "atl,SBx8LIFXCAT", "marvell,kirkwood-98DX4122", + "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; /* 128 MB */ + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + aliases { + ethernet0 = ð0; + i2c0 = &i2c0; + spi0 = &spi0; + }; + + dsa { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + dsa,ethernet = <ð0>; + dsa,mii-bus = <&mdio>; + status = "okay"; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1 0>; + + port@0 { + reg = <0>; + label = "internal0"; + }; + port@1 { + reg = <1>; + label = "internal1"; + }; + port@8 { + reg = <8>; + label = "internal8"; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + port@9 { + reg = <9>; + label = "internal9"; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + port@10 { + reg = <10>; + label = "cpu"; + }; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + ledn { + label = "status:ledn"; + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + }; + + ledp { + label = "status:ledp"; + gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <50000000>; + mode = <0>; + + partition@u-boot { + reg = <0x00000000 0x00c00000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x00c00000 0x00040000>; + label = "u-boot-env"; + }; + partition@unused { + reg = <0x00100000 0x00f00000>; + label = "unused"; + }; + }; +}; + +&i2c0 { + status = "okay"; + + eeprom@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + }; + + gpio3: gpio@76 { + #gpio-cells = <2>; + compatible = "nxp,pca9539"; + reg = <0x76>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + speed = <1000>; + duplex = <1>; + }; +}; diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 5a5a63cea7..3b860c4f55 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -62,6 +62,9 @@ config TARGET_NSA310S config TARGET_SBx81LIFKW bool "Allied Telesis SBx81GS24/SBx81GT40/SBx81XS6/SBx81XS16" +config TARGET_SBx81LIFXCAT + bool "Allied Telesis SBx81GP24/SBx81GT24" + endchoice config SYS_SOC @@ -85,5 +88,6 @@ source "board/Seagate/goflexhome/Kconfig" source "board/Seagate/nas220/Kconfig" source "board/zyxel/nsa310s/Kconfig" source "board/alliedtelesis/SBx81LIFKW/Kconfig" +source "board/alliedtelesis/SBx81LIFXCAT/Kconfig" endif diff --git a/arch/arm/mach-mvebu/.gitignore b/arch/arm/mach-mvebu/.gitignore new file mode 100644 index 0000000000..775b9346b8 --- /dev/null +++ b/arch/arm/mach-mvebu/.gitignore @@ -0,0 +1 @@ +kwbimage.cfg diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 3df124c6a8..d1f71338ac 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -148,6 +148,7 @@ config SYS_BOARD default "ds414" if TARGET_DS414 default "maxbcm" if TARGET_MAXBCM default "theadorable" if TARGET_THEADORABLE + default "a38x" if TARGET_CONTROLCENTERDC config SYS_CONFIG_NAME default "clearfog" if TARGET_CLEARFOG @@ -163,6 +164,7 @@ config SYS_CONFIG_NAME default "theadorable" if TARGET_THEADORABLE default "turris_omnia" if TARGET_TURRIS_OMNIA default "turris_mox" if TARGET_TURRIS_MOX + default "controlcenterdc" if TARGET_CONTROLCENTERDC config SYS_VENDOR default "Marvell" if TARGET_DB_MV784MP_GP @@ -176,24 +178,25 @@ config SYS_VENDOR default "Synology" if TARGET_DS414 default "CZ.NIC" if TARGET_TURRIS_OMNIA default "CZ.NIC" if TARGET_TURRIS_MOX + default "gdsys" if TARGET_CONTROLCENTERDC config SYS_SOC default "mvebu" -if TARGET_TURRIS_OMNIA - choice - prompt "Turris Omnia boot method" + prompt "Boot method" -config TURRIS_OMNIA_SPL_BOOT_DEVICE_SPI +config MVEBU_SPL_BOOT_DEVICE_SPI bool "SPI NOR flash" -config TURRIS_OMNIA_SPL_BOOT_DEVICE_MMC +config MVEBU_SPL_BOOT_DEVICE_MMC bool "SDIO/MMC card" + select SPL_LIBDISK_SUPPORT -endchoice +config MVEBU_SPL_BOOT_DEVICE_UART + bool "UART" -endif +endchoice config MVEBU_EFUSE bool "Enable eFuse support" diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index ade7b87064..ee2eca9134 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -25,6 +25,39 @@ obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o obj-$(CONFIG_MVEBU_EFUSE) += efuse.o + +extra-y += kwbimage.cfg + +KWB_REPLACE += BOOT_FROM +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),) + KWB_CFG_BOOT_FROM=spi +endif +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),) + KWB_CFG_BOOT_FROM=sdio +endif +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),) + KWB_CFG_BOOT_FROM=uart +endif + +ifneq ($(CONFIG_SECURED_MODE_IMAGE),) +KWB_REPLACE += CSK_INDEX +KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX) + +KWB_REPLACE += SEC_BOOT_DEV +KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \ + $(if $(findstring BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \ + $(if $(findstring BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \ + ) + +KWB_REPLACE += SEC_FUSE_DUMP +KWB_CFG_SEC_FUSE_DUMP = a38x +endif + +$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ + include/config/auto.conf + $(Q)sed -ne '$(foreach V,$(KWB_REPLACE),s/^#@$(V)/$(V) $(KWB_CFG_$(V))/;)p' \ + <$< >$(dir $<)$(@F) + endif # CONFIG_SPL_BUILD obj-y += gpio.o obj-y += mbus.o diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 2acfd3314a..9f51411e43 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -32,12 +32,12 @@ #endif /* - * By default kwbimage.cfg from board specific folder is used + * By default the generated mvebu kwbimage.cfg is used * If for some board, different configuration file need to be used, * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file */ #ifndef CONFIG_SYS_KWD_CONFIG -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg +#define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg #endif /* CONFIG_SYS_KWD_CONFIG */ /* Add target to build it automatically upon "make" */ diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in new file mode 100644 index 0000000000..72e67d75c3 --- /dev/null +++ b/arch/arm/mach-mvebu/kwbimage.cfg.in @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese <sr@denx.de> +# + +# Armada 38x uses version 1 image format +VERSION 1 + +# Boot Media configurations +#@BOOT_FROM + +# Binary Header (bin_hdr) with DDR3 training code +BINARY spl/u-boot-spl.bin 0000005b 00000068 |