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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-08-02 19:03:26 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:07:08 -0700 |
| commit | 664b6520582fcea7e150f57258c7a63627837318 (patch) | |
| tree | 12d0456f8dfe80a95eb52f1209d39c1c24f86f50 /arch/arm | |
| parent | c37fdbdbb0dd65cb4aa147c9cf9352901014be3b (diff) | |
fsl: csu: add an API to set R/W permission to PCIe
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h index db76066c80..f46f1d866a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h @@ -6,6 +6,7 @@ #ifndef __FSL_NS_ACCESS_H_ #define __FSL_NS_ACCESS_H_ +#include <fsl_csu.h> enum csu_cslx_ind { CSU_CSLX_PCIE2_IO = 0, |