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authorAneesh Bansal <aneesh.bansal@freescale.com>2015-12-08 13:54:27 +0530
committerYork Sun <yorksun@freescale.com>2015-12-15 08:57:34 +0800
commit70f959c3c45bd408ba4f7b18a3a69afd9ccfe739 (patch)
tree395527cca3de20daf5dbcd0dceeba89c42db2285 /arch/arm
parentb644d3e932f133bbb8b577c1965eae399b7df99e (diff)
armv8: Make SEC read/write as snoopable for LS1043
For LS1043, SEC read/writes are made snoopable by setting the corresponding bits in SCFG to avoid coherency issues. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index a0de4becd1..8d40405923 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -161,11 +161,16 @@ void fsl_lsch3_early_init_f(void)
void fsl_lsch2_early_init_f(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+ struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
#ifdef CONFIG_FSL_IFC
init_early_memctl_regs(); /* tighten IFC timing */
#endif
+ /* Make SEC reads and writes snoopable */
+ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
+ SCFG_SNPCNFGCR_SECWRSNP);
+
/*
* Enable snoop requests and DVM message requests for
* Slave insterface S4 (A53 core cluster)