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authorIcenowy Zheng <icenowy@aosc.xyz>2017-06-03 17:10:23 +0800
committerJagan Teki <jagan@amarulasolutions.com>2017-06-08 22:37:55 +0530
commit72cc987002539b23b0c97321cc2ccfc1b05f48de (patch)
treef9cb13a78a3d502d8fa3c1c3694c3fc37c145c8b /arch/arm
parent7d06e59f73f0d4d2733fe41529cefa264404e0d9 (diff)
sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller
Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM chips. Add support for LPDDR3 DRAM in the DesignWare-like DRAM controller code. Real LPDDR3 chips' support is not added yet in this commit. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-sunxi/Kconfig3
-rw-r--r--arch/arm/mach-sunxi/dram_sunxi_dw.c2
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index ca6417388a..2761915638 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -226,6 +226,9 @@ config SUNXI_DRAM_DDR3
config SUNXI_DRAM_DDR2
bool
+config SUNXI_DRAM_LPDDR3
+ bool
+
choice
prompt "DRAM Type and Timing"
default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index 20c3055b7a..78b4ffb9c3 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -342,6 +342,8 @@ static void mctl_set_cr(uint16_t socid, struct dram_para *para)
MCTL_CR_DDR3 | MCTL_CR_2T |
#elif defined CONFIG_SUNXI_DRAM_DDR2
MCTL_CR_DDR2 | MCTL_CR_2T |
+#elif defined CONFIG_SUNXI_DRAM_LPDDR3
+ MCTL_CR_LPDDR3 | MCTL_CR_1T |
#else
#error Unsupported DRAM type!
#endif