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authorSimon Glass <sjg@chromium.org>2016-01-30 16:37:46 -0700
committerTom Warren <twarren@nvidia.com>2016-02-16 09:17:50 -0700
commit7429b9623b9d636d6fc686db3af29cc79d901bc6 (patch)
treec23044441fa103b396b04044dac40234e3ef5769 /arch/arm
parent651827c0fc3d91e0a6f2170890a11bc77557ee2e (diff)
tegra: pwm: Add a driver for the tegra PWM
This PWM supports four channels. The driver always uses the 32KHz clock, and adjusts the duty cycle accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-tegra/pwm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/pwm.h b/arch/arm/include/asm/arch-tegra/pwm.h
index 92dced448a..eb2e465772 100644
--- a/arch/arm/include/asm/arch-tegra/pwm.h
+++ b/arch/arm/include/asm/arch-tegra/pwm.h
@@ -27,6 +27,7 @@ struct pwm_ctlr {
#define PWM_DIVIDER_SHIFT 0
#define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT)
+#ifndef CONFIG_PWM
/**
* Program the PWM with the given parameters.
*
@@ -56,5 +57,6 @@ int pwm_request(const void *blob, int node, const char *prop_name);
* @return 0 if ok, -1 if the device tree node was not found or invalid.
*/
int pwm_init(const void *blob);
+#endif
#endif /* __ASM_ARCH_TEGRA_PWM_H */