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authorHauke Mehrtens <hauke@hauke-m.de>2018-06-09 18:34:46 +0200
committerJagan Teki <jagan@amarulasolutions.com>2018-06-16 14:52:42 +0530
commit76d69eb01dee492f5ecf43c43d7301fec6c5b99f (patch)
tree022267f8afbb765f8a07e43a32b4372bc8027836 /arch/arm
parenta6580dfd4667f0d96c9b98173ea413ea45759cdc (diff)
sun50i: h5: Add initial Orange Pi Zero Plus support
Orange Pi Zero Plus is an open-source single-board computer using the Allwinner H5 SOC. H5 Orangepi Zero Plus has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot - 16MBit SPI Nor flash - Debug TTL UART - 1GBit/s Ethernet (RTL8211E) - Wifi (RTL8189FTV) - USB 2.0 Host - USB 2.0 OTG + power supply The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts145
2 files changed, 146 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 297160b3bd..3da8fc7a18 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -382,6 +382,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
+ sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
new file mode 100644
index 0000000000..e79cf3baf4
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Xunlong Orange Pi Zero Plus";
+ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &rtl8189ftv;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ default-state = "on";
+ };
+
+ status {
+ label = "orangepi:red:status";
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ /*
+ * Explicitly define the sdio device, so that we can add an ethernet
+ * alias for it (which e.g. makes u-boot set a mac-address).
+ */
+ rtl8189ftv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+/*
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ };
+};
+*/
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};