diff options
| author | Heinrich Schuchardt <xypron.glpk@gmx.de> | 2018-04-03 21:59:33 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2018-06-03 15:27:21 +0200 |
| commit | 78f90aaeeccc9e5501299291e441db18038d9fc7 (patch) | |
| tree | 8e72dc46e2c2c4e786612ad3c34758018ae71ad9 /arch/arm | |
| parent | c3b11dea7c9f9bb009cb7358170c47abd1c4a298 (diff) | |
arm: armv7: allow unaligned memory access
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.
This patch implements the function unaligned_access() to reset the aligned
access flag in the system control register (SCTLR). It is called when the
bootefi command is invoked.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix SPDX identifier]
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv7/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/sctlr.S | 22 |
2 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 26056647df..4f4647c90a 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -12,6 +12,10 @@ obj-y += syslib.o obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o +ifneq ($(CONFIG_SPL_BUILD),y) +obj-$(CONFIG_EFI_LOADER) += sctlr.o +endif + ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/sctlr.S b/arch/arm/cpu/armv7/sctlr.S new file mode 100644 index 0000000000..bd56e41afe --- /dev/null +++ b/arch/arm/cpu/armv7/sctlr.S @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Routines to access the system control register + * + * Copyright (c) 2018 Heinrich Schuchardt + */ + +#include <linux/linkage.h> + +/* + * void allow_unaligned(void) - allow unaligned access + * + * This routine clears the aligned flag in the system control register. + * After calling this routine unaligned access does no longer lead to a + * data abort but is handled by the CPU. + */ +ENTRY(allow_unaligned) + mrc p15, 0, r0, c1, c0, 0 @ load system control register + bic r0, r0, #2 @ clear aligned flag + mcr p15, 0, r0, c1, c0, 0 @ write system control register + bx lr @ return +ENDPROC(allow_unaligned) |