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| author | Tom Rini <trini@konsulko.com> | 2019-05-20 13:53:51 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-20 13:53:51 -0400 |
| commit | 79764b5081d276596dc9294dece73354f81a6801 (patch) | |
| tree | 35b590b7fa99f65de5b44efa9e208af58dfa028d /arch/arm | |
| parent | 956520cd7012dfa871bfd06b5f9defd148b4572c (diff) | |
| parent | c598c4837d782f6d9481f4be07ae5d679c6df976 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- H6 WDT reset fix (Clément)
- H6 SPL_TEXT_BASE fixes (Clément, Jonas)
- NPI-M1+ emac enablment (Emmanuel)
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-sunxi/board.c | 9 |
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h index 41a9b0fc47..6392cb07b4 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h @@ -60,6 +60,7 @@ #define SUNXI_RTC_BASE 0x07000000 #define SUNXI_R_CPUCFG_BASE 0x07000400 #define SUNXI_PRCM_BASE 0x07010000 +#define SUNXI_R_WDOG_BASE 0x07020400 #define SUNXI_R_PIO_BASE 0x07022000 #define SUNXI_R_UART_BASE 0x07080000 #define SUNXI_R_TWI_BASE 0x07081400 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 7f5b633e01..8e9bb63d9d 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -289,9 +289,14 @@ void reset_cpu(ulong addr) writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); } #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6) +#if defined(CONFIG_MACH_SUN50I_H6) + /* WDOG is broken for some H6 rev. use the R_WDOG instead */ static const struct sunxi_wdog *wdog = - ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; - + (struct sunxi_wdog *)SUNXI_R_WDOG_BASE; +#else + static const struct sunxi_wdog *wdog = + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; +#endif /* Set the watchdog for its shortest interval (.5s) and wait */ writel(WDT_CFG_RESET, &wdog->cfg); writel(WDT_MODE_EN, &wdog->mode); |