Merge branch 'master' of git://git.denx.de/u-boot-i2c

- DM_I2C_COMPAT removal for all ti platforms from Jean-Jacques Hiblot
- Fix in i2c command help output from Chirstoph Muellner.

12 files changed, 130 insertions, 198 deletions

diff --git a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi
index 530f54989c..03a1c1dd39 100644
--- a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi
+++ b/arch/arm/dts/am437x-gp-evm-u-boot.dtsi
@@ -36,3 +36,7 @@
 &phy_sel {
 	u-boot,dm-spl;
 };
+
+&i2c0 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi
index a6a7801a4b..1eb50cd438 100644
--- a/arch/arm/dts/omap5-u-boot.dtsi
+++ b/arch/arm/dts/omap5-u-boot.dtsi
@@ -95,3 +95,7 @@
 &gpio7 {
 	u-boot,dm-spl;
 };
+
+&i2c1 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/include/asm/arch-am33xx/i2c.h b/arch/arm/include/asm/arch-am33xx/i2c.h
index 491fca944d..c2a98500d9 100644
--- a/arch/arm/include/asm/arch-am33xx/i2c.h
+++ b/arch/arm/include/asm/arch-am33xx/i2c.h
@@ -6,57 +6,14 @@
 #ifndef _I2C_AM33XX_H_
 #define _I2C_AM33XX_H_
 
+#include <asm/omap_i2c.h>
+
 #define  I2C_BASE1		0x44E0B000
 #define  I2C_BASE2		0x4802A000
 #define  I2C_BASE3		0x4819C000
 
 #define I2C_DEFAULT_BASE		I2C_BASE1
 
-struct i2c {
-	unsigned short revnb_lo;        /* 0x00 */
-	unsigned short res1;
-	unsigned short revnb_hi;        /* 0x04 */
-	unsigned short res2[5];
-	unsigned short sysc;		/* 0x10 */
-	unsigned short res3[9];
-	unsigned short irqstatus_raw;   /* 0x24 */
-	unsigned short res4;
-	unsigned short stat;            /* 0x28 */
-	unsigned short res5;
-	unsigned short ie;              /* 0x2C */
-	unsigned short res6;
-	unsigned short irqenable_clr;   /* 0x30 */
-	unsigned short res7;
-	unsigned short iv;              /* 0x34 */
-	unsigned short res8[45];
-	unsigned short syss;            /* 0x90 */
-	unsigned short res9;
-	unsigned short buf;             /* 0x94 */
-	unsigned short res10;
-	unsigned short cnt;             /* 0x98 */
-	unsigned short res11;
-	unsigned short data;            /* 0x9C */
-	unsigned short res13;
-	unsigned short res14;           /* 0xA0 */
-	unsigned short res15;
-	unsigned short con;             /* 0xA4 */
-	unsigned short res16;
-	unsigned short oa;              /* 0xA8 */
-	unsigned short res17;
-	unsigned short sa;              /* 0xAC */
-	unsigned short res18;
-	unsigned short psc;             /* 0xB0 */
-	unsigned short res19;
-	unsigned short scll;            /* 0xB4 */
-	unsigned short res20;
-	unsigned short sclh;            /* 0xB8 */
-	unsigned short res21;
-	unsigned short systest;         /* 0xBC */
-	unsigned short res22;
-	unsigned short bufstat;         /* 0xC0 */
-	unsigned short res23;
-};
-
 #define I2C_IP_CLK			48000000
 #define I2C_INTERNAL_SAMPLING_CLK	12000000
 
diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h
index 5ddaa0d485..b04c012656 100644
--- a/arch/arm/include/asm/arch-omap3/i2c.h
+++ b/arch/arm/include/asm/arch-omap3/i2c.h
@@ -8,51 +8,4 @@
 
 #define I2C_DEFAULT_BASE	I2C_BASE1
 
-struct i2c {
-	unsigned short rev;	/* 0x00 */
-	unsigned short res1;
-	unsigned short ie;	/* 0x04 */
-	unsigned short res2;
-	unsigned short stat;	/* 0x08 */
-	unsigned short res3;
-	unsigned short we;	/* 0x0C */
-	unsigned short res4;
-	unsigned short syss;	/* 0x10 */
-	unsigned short res4a;
-	unsigned short buf;	/* 0x14 */
-	unsigned short res5;
-	unsigned short cnt;	/* 0x18 */
-	unsigned short res6;
-	unsigned short data;	/* 0x1C */
-	unsigned short res7;
-	unsigned short sysc;	/* 0x20 */
-	unsigned short res8;
-	unsigned short con;	/* 0x24 */
-	unsigned short res9;
-	unsigned short oa;	/* 0x28 */
-	unsigned short res10;
-	unsigned short sa;	/* 0x2C */
-	unsigned short res11;
-	unsigned short psc;	/* 0x30 */
-	unsigned short res12;
-	unsigned short scll;	/* 0x34 */
-	unsigned short res13;
-	unsigned short sclh;	/* 0x38 */
-	unsigned short res14;
-	unsigned short systest;	/* 0x3c */
-	unsigned short res15;
-	unsigned short bufstat;	/* 0x40 */
-	unsigned short res16;
-	unsigned short oa1;	/* 0x44 */
-	unsigned short res17;
-	unsigned short oa2;	/* 0x48 */
-	unsigned short res18;
-	unsigned short oa3;	/* 0x4c */
-	unsigned short res19;
-	unsigned short actoa;	/* 0x50 */
-	unsigned short res20;
-	unsigned short sblock;	/* 0x54 */
-	unsigned short res21;
-};
-
 #endif /* _OMAP3_I2C_H_ */
diff --git a/arch/arm/include/asm/arch-omap4/i2c.h b/arch/arm/include/asm/arch-omap4/i2c.h
index c60aac778e..c8f2f9716f 100644
--- a/arch/arm/include/asm/arch-omap4/i2c.h
+++ b/arch/arm/include/asm/arch-omap4/i2c.h
@@ -8,49 +8,4 @@
 
 #define I2C_DEFAULT_BASE	I2C_BASE1
 
-struct i2c {
-	unsigned short revnb_lo;	/* 0x00 */
-	unsigned short res1;
-	unsigned short revnb_hi;	/* 0x04 */
-	unsigned short res2[5];
-	unsigned short sysc;		/* 0x10 */
-	unsigned short res3[9];
-	unsigned short irqstatus_raw;	/* 0x24 */
-	unsigned short res4;
-	unsigned short stat;		/* 0x28 */
-	unsigned short res5;
-	unsigned short ie;		/* 0x2C */
-	unsigned short res6;
-	unsigned short irqenable_clr;	/* 0x30 */
-	unsigned short res7;
-	unsigned short iv;		/* 0x34 */
-	unsigned short res8[45];
-	unsigned short syss;		/* 0x90 */
-	unsigned short res9;
-	unsigned short buf;		/* 0x94 */
-	unsigned short res10;
-	unsigned short cnt;		/* 0x98 */
-	unsigned short res11;
-	unsigned short data;		/* 0x9C */
-	unsigned short res13;
-	unsigned short res14;		/* 0xA0 */
-	unsigned short res15;
-	unsigned short con;		/* 0xA4 */
-	unsigned short res16;
-	unsigned short oa;		/* 0xA8 */
-	unsigned short res17;
-	unsigned short sa;		/* 0xAC */
-	unsigned short res18;
-	unsigned short psc;		/* 0xB0 */
-	unsigned short res19;
-	unsigned short scll;		/* 0xB4 */
-	unsigned short res20;
-	unsigned short sclh;		/* 0xB8 */
-	unsigned short res21;
-	unsigned short systest;		/* 0xBC */
-	unsigned short res22;
-	unsigned short bufstat;		/* 0xC0 */
-	unsigned short res23;
-};
-
 #endif /* _OMAP4_I2C_H_ */
diff --git a/arch/arm/include/asm/arch-omap5/i2c.h b/arch/arm/include/asm/arch-omap5/i2c.h
index 60e2b4bfa0..9e1edcf2b7 100644
--- a/arch/arm/include/asm/arch-omap5/i2c.h
+++ b/arch/arm/include/asm/arch-omap5/i2c.h
@@ -8,49 +8,4 @@
 
 #define I2C_DEFAULT_BASE	I2C_BASE1
 
-struct i2c {
-	unsigned short revnb_lo;	/* 0x00 */
-	unsigned short res1;
-	unsigned short revnb_hi;	/* 0x04 */
-	unsigned short res2[5];
-	unsigned short sysc;		/* 0x10 */
-	unsigned short res3[9];
-	unsigned short irqstatus_raw;	/* 0x24 */
-	unsigned short res4;
-	unsigned short stat;		/* 0x28 */
-	unsigned short res5;
-	unsigned short ie;		/* 0x2C */
-	unsigned short res6;
-	unsigned short irqenable_clr;	/* 0x30 */
-	unsigned short res7;
-	unsigned short iv;		/* 0x34 */
-	unsigned short res8[45];
-	unsigned short syss;		/* 0x90 */
-	unsigned short res9;
-	unsigned short buf;		/* 0x94 */
-	unsigned short res10;
-	unsigned short cnt;		/* 0x98 */
-	unsigned short res11;
-	unsigned short data;		/* 0x9C */
-	unsigned short res13;
-	unsigned short res14;		/* 0xA0 */
-	unsigned short res15;
-	unsigned short con;		/* 0xA4 */
-	unsigned short res16;
-	unsigned short oa;		/* 0xA8 */
-	unsigned short res17;
-	unsigned short sa;		/* 0xAC */
-	unsigned short res18;
-	unsigned short psc;		/* 0xB0 */
-	unsigned short res19;
-	unsigned short scll;		/* 0xB4 */
-	unsigned short res20;
-	unsigned short sclh;		/* 0xB8 */
-	unsigned short res21;
-	unsigned short systest;		/* 0xBC */
-	unsigned short res22;
-	unsigned short bufstat;		/* 0xC0 */
-	unsigned short res23;
-};
-
 #endif /* _OMAP5_I2C_H_ */
diff --git a/arch/arm/include/asm/omap_i2c.h b/arch/arm/include/asm/omap_i2c.h
new file mode 100644
index 0000000000..c1695cbbee
--- /dev/null
+++ b/arch/arm/include/asm/omap_i2c.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _OMAP_I2C_H
+#define _OMAP_I2C_H
+
+#include <asm/arch/cpu.h>
+
+#ifdef CONFIG_DM_I2C
+
+/* Information about a GPIO bank */
+struct omap_i2c_platdata {
+	ulong base;	/* address of registers in physical memory */
+	int speed;
+	int ip_rev;
+};
+
+#endif
+
+enum {
+	OMAP_I2C_REV_V1 = 0,
+	OMAP_I2C_REV_V2 = 1,
+};
+
+#endif /* _OMAP_I2C_H */
diff --git a/arch/arm/mach-keystone/ddr3_spd.c b/arch/arm/mach-keystone/ddr3_spd.c
index 2613092552..6eee9ad13a 100644
--- a/arch/arm/mach-keystone/ddr3_spd.c
+++ b/arch/arm/mach-keystone/ddr3_spd.c
@@ -403,6 +403,7 @@ static void init_ddr3param(struct ddr3_spd_cb *spd_cb,
 static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
 {
 	int ret;
+#ifndef CONFIG_DM_I2C
 	int old_bus;
 
 	i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);
@@ -413,7 +414,13 @@ static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
 	ret = i2c_read(0x53, 0, 1, (unsigned char *)spd_params, 256);
 
 	i2c_set_bus_num(old_bus);
+#else
+	struct udevice *dev;
 
+	ret = i2c_get_chip_for_busnum(1, 0x53, 1, &dev);
+	if (!ret)
+		ret = dm_i2c_read(dev, 0, (unsigned char *)spd_params, 256);
+#endif
 	if (ret) {
 		printf("Cannot read DIMM params\n");
 		return 1;
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index f5f2bd5308..2fc364d112 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -19,6 +19,7 @@
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/i2c.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
@@ -93,6 +94,20 @@ U_BOOT_DEVICES(am33xx_uarts) = {
 #  endif
 };
 
+#ifdef CONFIG_DM_I2C
+static const struct omap_i2c_platdata am33xx_i2c[] = {
+	{ I2C_BASE1, 100000, OMAP_I2C_REV_V2},
+	{ I2C_BASE2, 100000, OMAP_I2C_REV_V2},
+	{ I2C_BASE3, 100000, OMAP_I2C_REV_V2},
+};
+
+U_BOOT_DEVICES(am33xx_i2c) = {
+	{ "i2c_omap", &am33xx_i2c[0] },
+	{ "i2c_omap", &am33xx_i2c[1] },
+	{ "i2c_omap", &am33xx_i2c[2] },
+};
+#endif
+
 #ifdef CONFIG_DM_GPIO
 static const struct omap_gpio_platdata am33xx_gpio[] = {
 	{ 0, AM33XX_GPIO0_BASE },
@@ -457,12 +472,15 @@ void early_system_init(void)
 #ifdef CONFIG_DEBUG_UART_OMAP
 	debug_uart_init();
 #endif
-#ifdef CONFIG_TI_I2C_BOARD_DETECT
-	do_board_detect();
-#endif
+
 #ifdef CONFIG_SPL_BUILD
 	spl_early_init();
 #endif
+
+#ifdef CONFIG_TI_I2C_BOARD_DETECT
+	do_board_detect();
+#endif
+
 #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
 	/* Enable RTC32K clock */
 	rtc32k_enable();
diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
index 0e7ad1d3af..ff1bfaf84b 100644
--- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
+++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
@@ -14,6 +14,7 @@
 
 /**
  * clk_synthesizer_reg_read - Read register from synthesizer.
+ * dev:		i2c bus device (not used if CONFIG_DM_I2C is not set)
  * @addr:	addr within the i2c device
  * buf:		Buffer to which value is to be read.
  *
@@ -21,13 +22,14 @@
  * be send along with enabling byte read more, and then read can happen.
  * Returns 0 on success
  */
-static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
+static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
 {
 	int rc;
 
 	/* Enable Bye read */
 	addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
 
+#ifndef CONFIG_DM_I2C
 	/* Send the command byte */
 	rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
 	if (rc)
@@ -35,26 +37,46 @@ static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
 
 	/* Read the Data */
 	return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
+#else
+	/* Send the command byte */
+	rc = dm_i2c_reg_write(dev, addr, *buf);
+	if (rc)
+		printf("Failed to send command to clock synthesizer\n");
+
+	/* Read the Data */
+	rc = dm_i2c_reg_read(dev, addr);
+	if (rc < 0)
+		return rc;
+
+	*buf = (u8)rc;
+	return 0;
+#endif
+
 }
 
 /**
  * clk_synthesizer_reg_write - Write a value to register in synthesizer.
+ * dev:		i2c bus device (not used if CONFIG_DM_I2C is not set)
  * @addr:	addr within the i2c device
  * val:		Value to be written in the addr.
  *
  * Enable the byte read mode in the address and start the i2c transfer.
  * Returns 0 on success
  */
-static int clk_synthesizer_reg_write(int addr, uint8_t val)
+static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
 {
-	uint8_t cmd[2];
+	u8 cmd[2];
 	int rc = 0;
 
 	/* Enable byte write */
 	cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
 	cmd[1] = val;
 
+#ifndef CONFIG_DM_I2C
 	rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
+#else
+	rc = dm_i2c_write(dev, addr, cmd, 2);
+#endif
 	if (rc)
 		printf("Clock synthesizer reg write failed at addr = 0x%x\n",
 		       addr);
@@ -72,30 +94,42 @@ static int clk_synthesizer_reg_write(int addr, uint8_t val)
 int setup_clock_synthesizer(struct clk_synth *data)
 {
 	int rc;
-	uint8_t val;
-
+	u8 val = 0;
+	struct udevice *dev = NULL;
+#ifndef CONFIG_DM_I2C
 	rc =  i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
 	if (rc) {
 		printf("i2c probe failed at address 0x%x\n",
 		       CLK_SYNTHESIZER_I2C_ADDR);
 		return rc;
 	}
-
-	rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
+#else
+	rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
+	if (rc) {
+		printf("failed to get device for synthesizer at address 0x%x\n",
+		       CLK_SYNTHESIZER_I2C_ADDR);
+		return rc;
+	}
+#endif
+	rc = clk_synthesizer_reg_read(dev, CLK_SYNTHESIZER_ID_REG, &val);
 	if (val != data->id)
 		return rc;
 
 	/* Crystal Load capacitor selection */
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_XCSEL,
+				       data->capacitor);
 	if (rc)
 		return rc;
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_MUX_REG,
+				       data->mux);
 	if (rc)
 		return rc;
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV2_REG,
+				       data->pdiv2);
 	if (rc)
 		return rc;
-	rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);
+	rc = clk_synthesizer_reg_write(dev, CLK_SYNTHESIZER_PDIV3_REG,
+				       data->pdiv3);
 	if (rc)
 		return rc;
 
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 790548ee79..5932d694d3 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -909,6 +909,7 @@ void prcm_init(void)
 		enable_basic_uboot_clocks();
 }
 
+#if !defined(CONFIG_DM_I2C)
 void gpi2c_init(void)
 {
 	static int gpi2c = 1;
@@ -919,3 +920,4 @@ void gpi2c_init(void)
 		gpi2c = 0;
 	}
 }
+#endif
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index 1a24acb748..772b4c4db5 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -12,6 +12,7 @@
  */
 #include <common.h>
 #include <debug_uart.h>
+#include <fdtdec.h>
 #include <spl.h>
 #include <asm/arch/sys_proto.h>
 #include <linux/sizes.h>
@@ -19,6 +20,7 @@
 #include <asm/omap_common.h>
 #include <linux/compiler.h>
 #include <asm/system.h>
+#include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -171,6 +173,10 @@ void __weak init_package_revision(void)
  */
 void early_system_init(void)
 {
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
+	int ret;
+	int rescan;
+#endif
 	init_omap_revision();
 	hw_data_init();
 	init_package_revision();
@@ -186,6 +192,7 @@ void early_system_init(void)
 	do_io_settings();
 #endif
 	setup_early_clocks();
+
 #ifdef CONFIG_SPL_BUILD
 	/*
 	 * Save the boot parameters passed from romcode.
@@ -193,11 +200,23 @@ void early_system_init(void)
 	 * to prevent overwrites.
 	 */
 	save_omap_boot_params();
+	spl_early_init();
 #endif
 	do_board_detect();
-#ifdef CONFIG_SPL_BUILD
-	spl_early_init();
+
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
+	/*
+	 * Board detection has been done.
+	 * Let us see if another dtb wouldn't be a better match
+	 * for our board
+	 */
+	ret = fdtdec_resetup(&rescan);
+	if (!ret && rescan) {
+		dm_uninit();
+		dm_init_and_scan(true);
+	}
 #endif
+
 	vcores_init();
 #ifdef CONFIG_DEBUG_UART_OMAP
 	debug_uart_init();