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authorLey Foon Tan <ley.foon.tan@intel.com>2019-03-22 01:24:04 +0800
committerMarek Vasut <marex@denx.de>2019-04-17 22:20:17 +0200
commit8ab9daabe5e88a401c891d02d4a765de2c6abaa2 (patch)
tree9814b08289457d2a74ab0730ad62b2ddcd38b207 /arch/arm
parent62e6278d1e7e6628a9ea8b4429a99247fc6a6be6 (diff)
arm: socfpga: stratix10: Add cpu_has_been_warmreset()
Add helper function cpu_has_been_warmreset() to check if CPU is from warm reset boot. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_s10.h3
-rw-r--r--arch/arm/mach-socfpga/reset_manager_s10.c9
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
index 31b73edabe..e186296791 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
@@ -9,6 +9,7 @@
void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
+int cpu_has_been_warmreset(void);
void socfpga_bridges_reset(int enable);
@@ -47,6 +48,8 @@ struct socfpga_reset_manager {
#define RSTMGR_MPUMODRST_CORE0 0
#define RSTMGR_PER0MODRST_OCP_MASK 0x0020bf00
#define RSTMGR_BRGMODRST_DDRSCH_MASK 0X00000040
+/* Watchdogs and MPU warm reset mask */
+#define RSTMGR_L4WD_MPU_WARMRESET_MASK 0x000F0F00
/*
* Define a reset identifier, from which a permodrst bank ID
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c
index f176c38495..f8dd787cc6 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -103,3 +103,12 @@ void reset_deassert_peripherals_handoff(void)
writel(~RSTMGR_PER0MODRST_OCP_MASK, &reset_manager_base->per0modrst);
writel(0, &reset_manager_base->per0modrst);
}
+
+/*
+ * Return non-zero if the CPU has been warm reset
+ */
+int cpu_has_been_warmreset(void)
+{
+ return readl(&reset_manager_base->status) &
+ RSTMGR_L4WD_MPU_WARMRESET_MASK;
+}