diff options
| author | Ramon Fried <ramon.fried@gmail.com> | 2018-05-16 12:13:41 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-05-26 18:19:16 -0400 |
| commit | 9558ddab96edbe98d26a258dbbde6f62be346dc5 (patch) | |
| tree | 2c65f4e676af61b1f452102d62b97eb7780c3c96 /arch/arm | |
| parent | ad97051b7ff61a92380dfcf3236e18503c1fe8ef (diff) | |
db410: added pinctrl node and serial bindings
Added TLMM pinctrl node for pin muxing & config.
Additionally, added a serial node for uart.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/dragonboard410c.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index d9d5831f4f..182a865b0a 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "skeleton64.dtsi" +#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> / { model = "Qualcomm Technologies, Inc. Dragonboard 410c"; @@ -38,6 +39,17 @@ ranges = <0x0 0x0 0x0 0xffffffff>; compatible = "simple-bus"; + pinctrl: qcom,tlmm@1000000 { + compatible = "qcom,tlmm-apq8016"; + reg = <0x1000000 0x400000>; + + blsp1_uart: uart { + function = "blsp1_uart"; + pins = "GPIO_4", "GPIO_5"; + drive-strength = <DRIVE_STRENGTH_8MA>; + bias-disable; + }; + }; clkc: qcom,gcc@1800000 { compatible = "qcom,gcc-apq8016"; reg = <0x1800000 0x80000>; @@ -49,6 +61,8 @@ compatible = "qcom,msm-uartdm-v1.4"; reg = <0x78b0000 0x200>; clock = <&clkc 4>; + pinctrl-names = "uart"; + pinctrl-0 = <&blsp1_uart>; }; soc_gpios: pinctrl@1000000 { |