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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2018-05-31 15:10:23 +0530
committerMichal Simek <michal.simek@xilinx.com>2018-06-01 11:37:31 +0200
commita18d09ea384fb66105fbfa24fd2d1288754b8f07 (patch)
treeaf4d25c51294ee29d8fdd1356dd5080b37bee56a /arch/arm
parentcedd48e2cdb752444444a97157025f16e63ee446 (diff)
fpga: zynqmp: Add secure bitstream loading for ZynqMP
This patch adds support for loading secure bitstreams on ZynqMP platforms. The secure bitstream images has to be generated using Xilinx bootgen tool. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-zynqmp/sys_proto.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index 6056bc6c0c..773b930512 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -13,8 +13,14 @@
#define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D
#define KEY_PTR_LEN 32
+#define ZYNQMP_FPGA_BIT_AUTH_DDR 1
+#define ZYNQMP_FPGA_BIT_AUTH_OCM 2
+#define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3
+#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4
#define ZYNQMP_FPGA_BIT_NS 5
+#define ZYNQMP_FPGA_AUTH_DDR 1
+
enum {
IDCODE,
VERSION,