diff options
| author | Jean-Jacques Hiblot <jjhiblot@ti.com> | 2018-02-27 17:05:48 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-03-13 21:59:28 -0400 |
| commit | a7b704a0b62a58cd5be1d2d3666e3fa845dc4923 (patch) | |
| tree | 7b400e5bcaf434e0cba25b55543963d3229fb9d2 /arch/arm | |
| parent | cb608ccb035a85d6233544f9da45eaccfa1a9ea1 (diff) | |
ARM: dts: dra76-evm: shift to using common IOdelay data
Now that we have a device-tree include file with common
MMC/SD IOdelay data for DRA76x SoC, shift the EVM device-tree
file to using that.
Also fix the name of the IO voltage regulator for mmc1.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/dra76-evm.dts | 51 |
1 files changed, 8 insertions, 43 deletions
diff --git a/arch/arm/dts/dra76-evm.dts b/arch/arm/dts/dra76-evm.dts index b024a65c6e..a1f289f345 100644 --- a/arch/arm/dts/dra76-evm.dts +++ b/arch/arm/dts/dra76-evm.dts @@ -9,6 +9,7 @@ #include "dra76x.dtsi" #include "dra7-evm-common.dtsi" +#include "dra76x-mmc-iodelay.dtsi" #include <dt-bindings/net/ti-dp83867.h> / { @@ -100,46 +101,6 @@ }; }; -&dra7_pmx_core { - mmc1_pins_default: mmc1_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; - - mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; - - mmc2_pins_default: mmc2_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ - DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ - DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ - DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ - DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ - DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ - DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ - DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ - DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ - DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ - >; - }; -}; - &i2c1 { status = "okay"; clock-frequency = <400000>; @@ -345,23 +306,27 @@ &mmc1 { status = "okay"; vmmc-supply = <&vio_3v3_sd>; - vmmc_aux-supply = <&ldo4_reg>; + vqmmc-supply = <&ldo4_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode * is always hardwired. */ cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; + pinctrl-names = "default", "hs"; pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_hs>; }; &mmc2 { status = "okay"; vmmc-supply = <&vio_1v8>; bus-width = <8>; - pinctrl-names = "default"; + pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_default>; + pinctrl-2 = <&mmc2_pins_default>; + pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>; }; /* No RTC on this device */ |